ADP1048 Analog Devices, ADP1048 Datasheet - Page 32

• Manufacturer Part Number: ADP1048
• Description: Digital Power Factor Correction Controller with accurate AC Power Metering
• Manufacturer: Analog Devices

ADP1047/ADP1048
BRIDGELESS BOOST OPERATION
The bridgeless boost configuration allows removal of the con-
duction losses caused by the input bridge of the PFC converter.
In this configuration, it is necessary to drive the two power
MOSFETs separately to achieve the highest efficiency. The
ADP1048
detect the ac line phase and zero crossings. Note that the maxi-
mum rating on the IBAL pin is VDD + 0.3 V; therefore, a clamp
circuit must be connected to the IBAL pin.
can provide such signals. The IBAL pin is used to
AC
INPUT
T1 + T2 + T3
V
IBAL PIN
REC
PWM2
PWM
VAC
Figure 33. Schematic of Bridgeless PFC Circuit with the
(ADP1048
RELAY
Figure 34. Bridgeless Boost Operation
ONLY)
10
11
12
1
2
3
4
5
6
7
8
9
Rev. 0 | Page 32 of 84
AGND
VAC
VFB
OVP
PGND
ILIM
IBAL
CS–
CS+
DGND
PSON
VCORE
ADP1048
INRUSH
PGOOD
AC_OK
PWM2
SYNC
PWM
ADD
VDD
RES
RTD
SDA
SCL
During the positive ac line phase, only one boost stage is effec-
tively working. The second one is passive, and the current flows in
Q2 from the source to the drain. Turning the Q2 FET fully on
during this phase allows conduction losses in Q2 to be minimized.
When the ac line phase becomes negative, the roles of Q1 and Q2
are reversed, and Q2 actively switches while Q1 is always on. The
phase information is detected from the ac line via the IBAL pin.
During the soft start phase, both FETs are switching as a precau-
tionary measure; the same happens when the phase information
on the IBAL pin becomes corrupted or inaccurate.
Q1
T1
23
22
21
20
19
18
17
16
15
14
13
24
3.3V
PMBus
T2
ADP1048
Q2
T3
BULK
CAPACITOR
V
OUT
Data Sheet