ADUC7121 Analog Devices, ADUC7121 Datasheet - Page 58

• Manufacturer Part Number: ADUC7121
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
• Manufacturer: Analog Devices

Specifications of ADUC7121

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 32
• Adc # Channels: 9

ADuC7121
UART SERIAL INTERFACE
The ADuC7121 features a 16,450-compatible UART. The UART
is a full-duplex, universal, asynchronous receiver/transmitter. A
UART performs serial-to-parallel conversion on data characters
received from a peripheral device, and parallel-to-serial conver-
sion on data characters received from the ARM7TDMI. The
UART features a fractional divider that facilitates high accuracy
baud rate generation. The UART functionality is available on
the P1.0/SIN/SCL1/PLAI[7] and P1.1/SOUT/SDA1/PLAI[6]
pins of the ADuC7121.
The serial communication adopts an asynchronous protocol
that supports various word length, stop bits, and parity genera-
tion options selectable in the configuration register.
BAUD RATE GENERATION
The ADuC7121 features two methods of generating the UART
baud rate: normal 450 UART baud rate generation and ADuC7121
fractional divider.
Normal 450 UART Baud Rate Generation
The baud rate is a divided version of the core clock using the
value in COMDIV0 and COMDIV1 MMRs (16-bit value, DL).
The standard baud rate generator formula is
Table 80 lists common baud rate values.
Table 80. Baud Rate Using the Standard Baud Rate Generator
Baud Rate
9600
19,200
115,200
Fractional Divider
The fractional divider combined with the normal baud rate
generator allows the generating of a wider range of more
accurate baud rates.
Baud
CLOCK
CORE
rate
Figure 35. Baud Rate Generation Options
/(M + N/2048)
=
DL
0x88
0x44
0x0B
41
16
/2
.
×
78
2
MHz
×
DL
Actual Baud Rate
9600
19,200
118,691
FBEN
/16DL
UART
% Error
0%
0%
3%
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(1)
Calculation of the baud rate using fractional divider is as
follows:
For example, generation of 19,200 baud
where:
M = 1
N = 0.015 × 2048 = 30
where Baud Rate = 19,219 bps.
UART REGISTER DEFINITION
The UART interface consists of the following ten registers:
•
•
•
•
•
•
•
•
•
•
COMTX, COMRX, and COMDIV0 share the same address
location. COMTX and COMRX can be accessed when Bit 7 in
the COMCON0 register is cleared. COMDIV0 can be accessed
when Bit 7 of COMCON0 is set.
COMTX: 8-bit transmit register
COMRX: 8-bit receive register
COMDIV0: divisor latch (low byte)
COMDIV1: divisor latch (high byte)
COMCON0: line control register
COMCON1: line control register
COMSTA0: line status register
COMIEN0: interrupt enable register
COMIID0: interrupt identification register
COMDIV2: 16-bit fractional baud divide register
M
M
Baud
M
Baud
+
+
+
2048
2048
2048
Rate
Rate
N
N
N
=
=
=
=
=
. 1
19200
16
16
Baud
015
×
41
×
DL
67
.
×
78
Rate
41
16
41
41
×
×
MHz
.
.
×
2
.
78
78
2
78
67
×
×
×
MHz
MHz
(
MHz
16
(
×
M
1
2
+
×
+
DL
2048
30
2048
N
×
2
)
)