ADUC7121 Analog Devices, ADUC7121 Datasheet - Page 27

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ADUC7121

Manufacturer Part Number
ADUC7121
Description
Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
Manufacturer
Analog Devices
Datasheet

Specifications of ADUC7121

Mcu Core
ARM7 TDMI
Mcu Speed (mips)
40
Sram (bytes)
8192Bytes
Gpio Pins
32
Adc # Channels
9

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ADC CIRCUIT OVERVIEW
The analog-to-digital converter (ADC) incorporates a fast,
multichannel, 12-bit ADC. It can operate from a 3.0 V to 3.6 V
supply and is capable of providing a throughput of up to 1 MSPS
when the clock source is 41.78 MHz. This block provides the
user with a multichannel multiplexer, a differential track-and-
hold, an on-chip reference, and an ADC.
The ADC consists of a 12-bit successive approximation converter
based around two capacitor DACs. Depending on the input
signal configuration, the ADC can operate in one of the
following three modes:
The converter accepts an analog input range of 0 V to V
when operating in single-ended mode or pseudo differential
mode. In fully differential mode, the input signal must be balanced
around a common-mode voltage (V
AV
A high precision, low drift, and factory calibrated 2.5 V reference
is provided on chip. An external reference can also be connected
as described in the Band Gap Reference section.
Single or continuous conversion modes can be initiated in the
software. An external ADC
the on-chip PLA, a Timer0, or a Timer1 overflow can also be
used to generate a repetitive trigger for ADC conversions.
If the signal has not been deasserted by the time the ADC
conversion is complete, a second conversion begins automatically.
DD
Figure 12. Examples of Balanced Signals for Fully Differential Mode
Fully differential mode, for small and balanced signals.
Single-ended mode, for any single-ended signals.
Pseudo differential mode, for any single-ended signals,
taking advantage of the common-mode rejection offered
by the pseudo differential input.
and with a maximum amplitude of 2 V
AV
V
CM
DD
0
V
CM
CONVST
2V
V
CM
REF
pin, an output generated from
CM
) in the range of 0 V to
2V
REF
REF
2V
(see Figure 12).
REF
REF
Rev. 0 | Page 27 of 96
A voltage output from an on-chip band gap reference propor-
tional to absolute temperature can also be routed through the
front-end ADC multiplexer, effectively creating an additional
ADC channel input. This facilitates an internal temperature sensor
channel, measuring die temperature to an accuracy of ±3°C.
The ADuC7121 is modified in a way that differentiates its ADC
structure from other devices in the ADuC702x family.
The PADC0x and PADC1x inputs connect to a PGA and allow for
a gain from 1 to 5 with 32 steps. The remaining channels can be
configured as single ended or differential. A buffer is provided
before the ADC for measuring internal channels.
ADC TRANSFER FUNCTION
Pseudo Differential and Single-Ended Modes
For both pseudo differential and single-ended modes, the input
range is 0 to V
in both pseudo differential and single-ended modes with
The ideal code transitions occur midway between successive
integer LSB values (that is, 1/2 LSB, 3/2 LSBs, 5/2 LSBs, …,
FS − 3/2 LSBs). The ideal input/output transfer characteristic is
shown in Figure 13.
1 LSB = FS/4096, or 2.5 V/4096 = 0.61 mV, or 610 μV
when V
Figure 13. ADC Transfer Function in Pseudo Differential Mode or
1111 1111 1111
1111 1111 1110
1111 1111 1101
1111 1111 1100
0000 0000 0011
0000 0000 0010
0000 0000 0001
0000 0000 0000
REF
REF
= 2.5 V
. In addition, the output coding is straight binary
0V
1LSB
1LSB =
Single-Ended Mode
4096
FS
VOLTAGE INPUT
ADuC7121
+FS – 1LSB

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