AD7711 Analog Devices, AD7711 Datasheet - Page 12

• Manufacturer Part Number: AD7711
• Description: CMOS, 24-Bit Sigma-Delta, Signal Conditioning ADC with Matched RTD Excitation Currents
• Manufacturer: Analog Devices

Specifications of AD7711

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: 19.5kSPS
• Interface: Ser
• Analog Input Type: Diff-Bip,Diff-Uni,SE-Uni
• Ain Range: Bip (Vref)/(PGA Gain),Uni (Vref)/(PGA Gain)
• Adc Architecture: Sigma-Delta
• Pkg Type: DIP,SOIC

Figure 2 shows similar information to that outlined in Table I.
In these plots, however, the output rms noise is shown for the
full range of available cutoffs frequencies. The numbers given in
these plots are typical values at 25∞C.
CIRCUIT DESCRIPTION
The AD7711 is a sigma-delta A/D converter with on-chip digital
filtering for measuring wide dynamic range, low frequency signals
such as those in RTD applications, industrial control, or process
control applications. It contains a sigma-delta (or charge-bal-
ancing) ADC, a calibration microcontroller with on-chip static
RAM, a clock oscillator, a digital filter, and a bidirectional serial
communications port.
The part contains two analog input channels, a programmable
gain differential analog input, and a programmable gain single-
ended input. The gain range is from 1 to 128 allowing the part
to accept unipolar signals of 0 mV to 20 mV and 0 V to 2.5 V
or bipolar signals in the range ± 20 mV to ± 2.5 V when the
reference input voltage equals 2.5 V. The input signal to the
selected analog input channel is continuously sampled at a
rate determined by the frequency of the master clock, MCLK
IN, and the selected gain (see Table III). A charge-balancing
AD7711
10000
1000
1000
100
0.1
100
Figure 2b. Output Noise vs. Gain and Notch
Frequency (Gains of 16 to 128)
10
0.1
10
Figure 2a. Output Noise vs. Gain and Notch
Frequency (Gains of 1 to 8)
1
1
10
10
NOTCH FREQUENCY – Hz
NOTCH FREQUENCY – Hz
100
100
1000
1000
GAIN OF 16
GAIN OF 32
GAIN OF 64
GAIN OF 128
GAIN OF 1
GAIN OF 2
GAIN OF 4
GAIN OF 8
10000
10000
–12–
A/D converter (sigma-delta modulator) converts the sampled
signal into a digital pulse train whose duty cycle contains the
digital information. The programmable gain function on the
analog input is also incorporated in this sigma-delta modulator
with the input sampling frequency being modified to give the
higher gains. A sinc
put of the sigma-delta modulator and updates the output
register at a rate determined by the first notch frequency of
this filter. The output data can be read from the serial port
randomly or periodically at any rate up to the output register
update rate. The first notch of this digital filter (and therefore
its –3 dB frequency) can be programmed via an on-chip con-
trol register. The programmable range for this first notch
frequency is 9.76 Hz to 1.028 kHz, giving a programmable range
for the –3 dB frequency of 2.58 Hz to 269 Hz.
The basic connection diagram for the part is shown in Figure 3.
This figure shows the AD7711 in the external clocking mode
with both the AV
from the analog 5 V supply. Some applications have separate
supplies for both AV
log supply exceeds the 5 V digital supply (see the Power Sup-
plies and Grounding section).
The AD7711 provides a number of calibration options that can
be programmed via the on-chip control register. A calibration
cycle may be initiated at any time by writing to this control
register. The part can perform self-calibration using the on-chip
calibration microcontroller and SRAM to store calibration
parameters. Other system components may also be included in
the calibration loop to remove offset and gain errors in the input
channel using the system calibration mode. Another option is a
background calibration mode where the part continuously
performs self-calibration and updates the calibration coeffi-
cients. Once the part is in this mode, the user does not have to
issue periodic calibration commands to the device or recalibrate
when there is a change in the ambient temperature or power
supply voltage.
The AD7711 gives the user access to the on-chip calibration
registers, allowing the microprocessor to read the device calibra-
tion coefficients and also to write its own calibration coefficients
to the part from prestored values in E
ANALOG GROUND
DIGITAL GROUND
+5V SUPPLY
ANALOG
ANALOG INPUT
DIFFERENTIAL
ANALOG INPUT
SINGLE-ENDED
Figure 3. Basic Connection Diagram
10 F
DD
3
and DV
DD
0.1 F
digital low-pass filter processes the out-
and DV
AIN1(+)
AIN1(–)
AIN2
RTD1
RTD2
AGND
V
DGND
REF OUT
REF IN(+)
V
REF IN(–)
SS
BIAS
DD
AV
AD7711
pins of the AD7711 being driven
DD
DD
, and in some cases, the ana-
DV
MCLK OUT
DD
2
MCLK IN
PROM. This gives the
SDATA
MODE
DRDY
SYNC
SCLK
RFS
TFS
A0
0.1 F
+5V
DATA READY
TRANSMIT (WRITE)
RECEIVE (READ)
SERIAL DATA
SERIAL CLOCK
ADDRESS INPUT
REV. G