AD9866 Analog Devices, AD9866 Datasheet - Page 2

• Manufacturer Part Number: AD9866
• Manufacturer: Analog Devices

Specifications of AD9866

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 80MSPS
• Interface: Nibble
• Analog Input Type: Diff-Uni
• Ain Range: 6.3 V p-p,8 mV p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9866
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 9
Pin Configuration and Function Descriptions........................... 10
Typical Performance Characteristics ........................................... 12
Serial Port ........................................................................................ 19
Digital Interface .............................................................................. 23
REVISION HISTORY
8/11—Rev. A to Rev. B
Deleted Lead Temperature Range Parameter, Table 8 ................. 9
Moved Explanation of Test Levels .................................................. 9
Added EPAD Note to Figure 2 and Added EPAD Note
to Table 9.......................................................................................... 10
Changes to Figure 53...................................................................... 24
Changes to Figure 54...................................................................... 25
Changes to Figure 59...................................................................... 28
Tx Path Specifications.................................................................. 3
Rx Path Specifications.................................................................. 4
Power Supply Specifications........................................................ 5
Digital Specifications ................................................................... 6
Serial Port Timing Specifications ............................................... 7
Half-Duplex Data Interface (ADIO Port) Timing
Specifications ................................................................................ 7
Full-Duplex Data Interface (Tx and Rx PORT) Timing
Specifications ................................................................................ 8
Thermal Characteristics .............................................................. 9
Explanation of Test Levels ........................................................... 9
ESD Caution.................................................................................. 9
Rx Path Typical Performance Characteristics ........................ 12
TxDAC Path Typical Performance Characteristics ............... 16
IAMP Path Typical Performance Characteristics .................. 18
Register Map Description.......................................................... 21
Serial Port Interface (SPI).......................................................... 21
Half-Duplex Mode ..................................................................... 23
Full-Duplex Mode ...................................................................... 24
RxPGA Control .......................................................................... 26
Rev. B | Page 2 of 48
Transmit Path.................................................................................. 28
Receive Path .................................................................................... 33
Clock Synthesizer ........................................................................... 37
Power Control and Dissipation .................................................... 39
PCB Design Considerations.......................................................... 44
Evaluation Board ............................................................................ 46
Outline Dimensions ....................................................................... 47
12/04—Rev. 0 to Rev. A
Changes to Specifications Tables.....................................................3
Changes to Serial Table.................................................................. 19
Changes to Full Duplex Mode section......................................... 24
Changes to Table 14 ....................................................................... 25
Change to TxDAC and IAMP Architecture section .................. 29
Change to TxDAC Output Operation section............................ 30
Insert equation................................................................................ 37
Change to Figure 84 caption ......................................................... 42
11/03—Revision 0: Initial Version
TxPGA Control .......................................................................... 27
Digital Interpolation Filters ...................................................... 28
TxDAC and IAMP Architecture .............................................. 29
Tx Programmable Gain Control .............................................. 30
TxDAC Output Operation........................................................ 30
IAMP Current-Mode Operation.............................................. 30
IAMP Voltage-Mode Operation............................................... 31
IAMP Current Consumption Considerations........................ 32
Rx Programmable Gain Amplifier........................................... 33
Low-Pass Filter............................................................................ 33
Analog-to-Digital Converter (ADC)....................................... 35
AGC Timing Considerations.................................................... 36
Power-Down ............................................................................... 39
Half-Duplex Power Savings ...................................................... 39
Power Reduction Options ......................................................... 40
Power Dissipation....................................................................... 42
Mode Select upon Power-Up and Reset.................................. 42
Analog and Digital Loopback Test Modes.............................. 43
Component Placement .............................................................. 44
Power Planes and Decoupling .................................................. 44
Ground Planes ............................................................................ 44
Signal Routing............................................................................. 45
Ordering Guide .......................................................................... 47