SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 601
SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 601 of 1325
- Download datasheet (30Mb)
34. High Speed MultiMediaCard Interface (HSMCI)
34.1
34.2
11055B–ATARM–22-Sep-11
Description
Embedded Characteristics
The High Speed MultiMediaCard Interface (HSMCI) supports the MultiMedia Card (MMC) Spec-
ification V4.3, the SD Memory Card Specification V2.0, the SDIO V2.0 specification and CE-ATA
V1.1.
The HSMCI includes a command register, response registers, data registers, timeout counters
and error detection logic that automatically handle the transmission of commands and, when
required, the reception of the associated responses and data with a limited processor overhead.
The HSMCI supports stream, block and multi block data read and write, and is compatible with
the DMA Controller (DMAC), minimizing processor intervention for large buffer transfers.
The HSMCI operates at a rate of up to Master Clock divided by 2 and supports the interfacing of
1 slot. Each slot may be used to interface with a High Speed MultiMediaCard bus (up to 30
Cards) or with an SD Memory Card. Only one slot can be selected at a time (slots are multi-
plexed). A bit field in the SD Card Register performs this selection.
The SD Memory Card communication is based on a 9-pin interface (clock, command, four data
and three power lines) and the High Speed MultiMedia Card on a 7-pin interface (clock, com-
mand, one data, three power lines and one reserved for future use).
The SD Memory Card interface also supports High Speed MultiMedia Card operations. The
main differences between SD and High Speed MultiMedia Cards are the initialization process
and the bus topology.
HSMCI fully supports CE-ATA Revision 1.1, built on the MMC System Specification v4.0. The
module includes dedicated hardware to issue the command completion signal and capture the
host command completion signal disable.
Protection Against Unexpected Modification On-the-Fly of the Configuration Registers
• Compatible with MMC Plus Specification Version 4.3
• Compatible with MultiMedia Plus Specification Version 4.3
• Compatible with SD Memory Card Specification Version 2.0
• Compatible with SDIO Specification Version 2.0
• Compatible with CE-ATA Specification 1.1
• Cards Clock Rate Up to Master Clock Divided by 2
• Boot Operation Mode Support
• High Speed Mode Support
• Embedded Power Management to Slow Down Clock Rate When Not Used
• Supports 1 Multiplexed Slot
• Support for Stream, Block and Multi-block Data Read and Write
• Supports Connection to DMA Controller (DMAC)
• Built in FIFO (from 16 to 256 bytes) with Large Memory Aperture Supporting Incremental
• Support for CE-ATA Completion Signal Disable Command
Access
– Each Slot for either a High Speed MultiMediaCard Bus (Up to 30 Cards) or an SD
– Minimizes Processor Intervention for Large Buffer Transfers
Memory Card
SAM9X35
601
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