SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 10
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SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 10 of 1325
- Download datasheet (30Mb)
4.2.1
10
SAM9X35
Reset State
In the tables that follow, the column “Reset State” indicates the reset state of the line with
mnemonics.
Indicates whether the PIO Line resets in I/O mode or in peripheral mode. If “PIO” is mentioned,
the PIO Line is maintained in a static state as soon as the reset is released. As a result, the bit
corresponding to the PIO Line in the register PIO_PSR (Peripheral Status Register) resets low.
If a signal name is mentioned in the “Reset State” column, the PIO Line is assigned to this func-
tion and the corresponding bit in PIO_PSR resets high. This is the case of pins controlling
memories, in particular the address lines, which require the pin to be driven as soon as the reset
is released.
Indicates whether the signal is input or output state.
Indicates whether Pull-Up, Pull-Down or nothing is enabled.
Indicates if Schmitt Trigger is enabled.
Note:
Table 4-2.
• “PIO” “/” signal
• “I”/”O”
• “PU”/”PD”
• “ST”
I/O Type
USBFS
USBHS
CLOCK
DIB
Example:
configured as an Input with Pull-Up and Schmitt Trigger enabled. PD14 reset state is “PIO, I, PU”.
That means PIO Input with Pull-Up. PD15 reset state is “A20, O, PD” which means output address
line 20 with Pull-Down.
I/O Frequency
SAM9X35 I/O Type Assignment and Frequency (Continued)
(MHz)
The PB18 “Reset State” column shows “PIO, I, PU, ST”. That means the line PIO18 is
480
12
50
25
Charge Load
(pF)
10
10
50
25
Current
Output
HFSDPA, HFSDPB/DFSDP, HFSDPC, HFSDMA,
HHSDPA, HHSDPB/DHSDP, HHSDMA,
HFSDMB/DFSDM, HFSDMC
XIN, XOUT, XIN32, XOUT32
HHSDMB/DHSDM
Signal Name
DIBN, DIBP
11055B–ATARM–22-Sep-11
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