SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 2

• Manufacturer Part Number: SAM9G20
• Manufacturer: Atmel Corporation

Specifications of SAM9G20

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 95
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

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2
Periodic Interval Timer (PIT)
Watchdog Timer (WDT)
Real-time Timer (RTT)
One 4-channel 10-bit Analog-to-Digital Converter
Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
Peripheral DMA Controller Channels (PDC)
One Two-slot MultiMedia Card Interface (MCI)
One Synchronous Serial Controller (SSC)
Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Two 2-wire UARTs
Two Master/Slave Serial Peripheral Interfaces (SPI)
Two Three-channel 16-bit Timer/Counters (TC)
One Two-wire Interface (TWI)
IEEE
Required Power Supplies
Available in a 217-ball LFBGA and 247-ball TFBGA RoHS-compliant Package
– 20-bit Interval Timer plus 12-bit Interval Counter
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– All I/O Lines are Schmitt Trigger Inputs
– SDCard/SDIO and MultiMediaCard
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
– Individual Baud Rate Generator, IrDA
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Signal Control on USART0
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Synchronous Communications
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
– High-Drive Capability on Outputs TIOA0, TIOA1, TIOA2
– Compatible with Standard Two-wire Serial Memories
– One, Two or Three Bytes for Slave Address
– Sequential Read/Write Operations
– Master, Multi-master and Slave Mode Operation
– Bit Rate: Up to 400 Kbits
– General Call Supported in Slave Mode
– Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes Data Transfers in Master Mode
– 0.9V to 1.1V for VDDBU, VDDCORE, VDDPLL
– 1.65 to 3.6V for VDDOSC
– 1.65V to 3.6V for VDDIOP (Peripheral I/Os)
– 3.0V to 3.6V for VDDUSB
– 3.0V to 3.6V VDDANA (Analog-to-digital Converter)
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)
®
1149.1 JTAG Boundary Scan on All Digital Pins
AT91SAM9G20 Summary
™
Compliant
®
Infrared Modulation/Demodulation, Manchester Encoding/Decoding
6384DS–ATARM–13-Jan-10