SAM3N2B Atmel Corporation, SAM3N2B Datasheet - Page 668

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SAM3N2B

Manufacturer Part Number
SAM3N2B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2B

Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
33.7.8
Name:
Address:
Access:
• LDATA: Last Data Converted
The analog-to-digital conversion data is placed into this register at the end of a conversion and remains until a new conver-
sion is completed.
• CHNB: Channel Number
Indicates the last converted channel when the TAG option is set to 1 in ADC_EMR register. If TAG option is not set,
CHNB = 0.
668
668
31
23
15
7
SAM3N
SAM3N
ADC Last Converted Data Register
30
22
14
ADC_LCDR
0x40038020
Read-only
6
CHNB
29
21
13
5
28
20
12
4
LDATA
27
19
11
3
26
18
10
2
LDATA
25
17
9
1
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
24
16
8
0

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