SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 416

• Manufacturer Part Number: SAM3N2A
• Manufacturer: Atmel Corporation

Specifications of SAM3N2A

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 47
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.7.28
Name:
Addresses:
Access:
• P0-P31: Glitch or Debouncing Filter Selection Status
0 = The Glitch Filter is able to filter glitches with a duration < Tmck2.
1 = The Debouncing Filter is able to filter pulses with a duration < Tdiv_slclk/2.
26.7.29
Name:
Addresses:
Access:
• DIVx: Slow Clock Divider Selection for Debouncing
Tdiv_slclk = 2*(DIV+1)*Tslow_clock.
416
416
DIV7
P31
P23
P15
P7
31
23
15
31
23
15
7
7
-
-
-
SAM3N
SAM3N
PIO Input Filter Slow Clock Status Register
PIO Slow Clock Divider Debouncing Register
DIV6
P30
P22
P14
P6
30
22
14
30
22
14
PIO_IFSCSR
0x400E0E88 (PIOA), 0x400E1088 (PIOB), 0x400E1288 (PIOC)
Read-only
6
PIO_SCDR
0x400E0E8C (PIOA), 0x400E108C (PIOB), 0x400E128C (PIOC)
Read-write
6
-
-
-
DIV13
DIV5
P13
P29
P21
P5
29
21
13
29
21
13
5
5
-
-
DIV12
DIV4
P28
P20
P12
P4
28
20
12
28
20
12
4
4
-
-
DIV11
DIV3
P11
P27
P19
P3
27
19
11
27
19
11
3
3
-
-
DIV10
DIV2
P26
P18
P10
P2
26
18
10
26
18
10
2
2
-
-
DIV9
DIV1
P25
P17
P9
P1
25
17
25
17
9
1
9
1
-
-
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
DIV0
DIV8
P24
P16
P8
P0
24
16
24
16
8
0
8
0
-
-