ATtiny87 Atmel Corporation, ATtiny87 Datasheet - Page 40
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ATtiny87
Manufacturer Part Number
ATtiny87
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny87
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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4.5.4
40
ATtiny87/ATtiny167
CLKSELR – Clock Selection Register
start-up time, the clock frequency and, of course, if the clock is alive. The user’s code has to
differentiate between ‘no_clock_signal’ and ‘clock_signal_not_yet_available’ condition.
• Bits 3:0 – CLKC[3:0]: Clock Control Bits 3 - 0
These bits define the command to provide to the ‘Clock Switch’ module. The special write pro-
cedure must be followed to change the CLKC[3:0] bits
Change Enable” on page
Interrupts should be disabled when setting CLKCSR register in order not to disturb the
procedure.
Table 4-11.
• Bit 7 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny87/167 and will always read as zero.
• Bit 6 – COUT: Clock Out
The COUT bit is initialized with ~(CKOUT) Fuse bit.
The COUT bit is only used in case of ‘CKOUT’ command. Refer to
Buffer” on page 31
In case of ‘Recover System Clock Source’ command, COUT it is not affected (no recovering of
this setting).
Bit
(0x63)
Read/Write
Initial Value
Clock Command
No command
Disable clock source
Enable clock source
Request for clock
Clock source switch
Recover system clock source code
Enable watchdog in automatic reload mode
CKOUT command
No command
1. Write the Clock Control Change Enable (CLKCCE) bit to one and all other bits in
2. Within 4 cycles, write the desired value to CLKCSR register while clearing CLKCCE
CLKCSR to zero.
bit.
Clock command list.
R
7
–
0
availability
for using.
~ (CKOUT)
COUT
R/W
fuse
6
39.).
CSUT1
R/W
5
SUT[1:0]
fuses
CSUT0
R/W
4
CSEL3
R/W
3
(See ”Bit 7 – CLKCCE: Clock Control
CSEL2
R/W
2
CKSEL[3:0]
fuses
Section 4.2.7 “Clock Output
CSEL1
R/W
1
CSEL0
R/W
CLKC[3:0]
0
8265B–AVR–09/10
1xxx
0000
0001
0010
0100
0101
0011
0110
0111
CLKSELR
b
b
b
b
b
b
b
b
b
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