ATtiny87 Atmel Corporation, ATtiny87 Datasheet - Page 179
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ATtiny87
Manufacturer Part Number
ATtiny87
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny87
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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15.5.15
15.5.15.1
15.5.15.2
15.5.16
8265B–AVR–09/10
Data Management
OCD Support
LIN FIFO Data Buffer
UART Data Register
The LIN protocol says that a message with an identifier from 60 (0x3C) up to 63 (0x3F) uses a
classic checksum (sum over the data bytes only). Software will be responsible for switching
correctly the LIN13 bit to provide/check this expected checksum (the insertion of the ID field in
the computation of the CRC is set - or not - just after entering the Rx or Tx Response
command).
To preserve register allocation, the LIN data buffer is seen as a FIFO (with address pointer
accessible). This FIFO is accessed via the LINDX[2:0] field of LINSEL register through the
LINDAT register.
LINDX[2:0], the data index, is the address pointer to the required data byte. The data byte can
be read or written. The data index is automatically incremented after each LINDAT access if
the LAINC (active low) bit is cleared. A roll-over is implemented, after data index=7 it is data
index=0. Otherwise, if LAINC bit is set, the data index needs to be written (updated) before
each LINDAT access.
The first byte of a LIN frame is stored at the data index=0, the second one at the data index=1,
and so on. Nevertheless, LINSEL must be initialized by the user before use.
The LINDAT register is the data register (no buffering - no FIFO). In write access, LINDAT will
be for data out and in read access, LINDAT will be for data in.
In UART mode the LINSEL register is unused.
When a debugger break occurs, the state machine of the LIN/UART controller is stopped
(included frame time-out) and further communication may be corrupted.
179
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