ATmega644R212 Atmel Corporation, ATmega644R212 Datasheet - Page 222

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ATmega644R212

Manufacturer Part Number
ATmega644R212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega644R212

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
18.7.2
8011O–AVR–07/10
Master Receiver Mode
In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter
(Slave see
must be transmitted. The format of the following address packet determines whether Master
Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is
entered, if SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this
section assume that the prescaler bits are zero or are masked to zero.
Figure 18-13. Data Transfer in Master Receiver Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be written to one to enable the 2-wire Serial Interface, TWSTA must be written to
one to transmit a START condition and TWINT must be set to clear the TWINT Flag. The TWI
will then test the 2-wire Serial Bus and generate a START condition as soon as the bus
becomes free. After a START condition has been transmitted, the TWINT Flag is set by hard-
ware, and the status code in TWSR will be 0x08 (See
MR mode, SLA+R must be transmitted. This is done by writing SLA+R to TWDR. Thereafter the
TWINT bit should be cleared (by writing it to one) to continue the transfer. This is accomplished
by writing the following value to TWCR:
When SLA+R have been transmitted and an acknowledgement bit has been received, TWINT is
set again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 0x38, 0x40, or 0x48. The appropriate action to be taken for each of these status codes
is detailed in
when the TWINT Flag is set high by hardware. This scheme is repeated until the last byte has
been received. After the last byte has been received, the MR should inform the ST by sending a
NACK after the last received data byte. The transfer is ended by generating a STOP condition or
a repeated START condition. A STOP condition is generated by writing the following value to
TWCR:
TWCR
value
TWCR
value
TWCR
value
SDA
SCL
Figure 18-13 on page
Table 18-3 on page
TWINT
TWINT
TWINT
1
1
1
Device 1
RECEIVER
MASTER
TWEA
TWEA
TWEA
X
X
X
TRANSMITTER
Device 2
SLAVE
TWSTA
222). In order to enter a Master mode, a START condition
TWSTA
TWSTA
223. Received data can be read from the TWDR Register
0
1
0
Device 3
TWSTO
TWSTO
TWSTO
0
0
1
ATmega164P/324P/644P
........
Table 18-2 on page
TWWC
TWWC
TWWC
Device n
X
X
X
V
CC
TWEN
TWEN
TWEN
1
1
1
R1
220). In order to enter
R2
0
0
0
TWIE
TWIE
TWIE
X
X
X
222

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