ATmega644R212 Atmel Corporation, ATmega644R212 Datasheet - Page 132

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ATmega644R212

Manufacturer Part Number
ATmega644R212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega644R212

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
13.11 Register Description
13.11.1
8011O–AVR–07/10
TCCR1A – Timer/Counter1 Control Register A
Figure 13-13. Timer/Counter Timing Diagram, with Prescaler (f
• Bit 7:6 – COMnA1:0: Compare Output Mode for Channel A
• Bit 5:4 – COMnB1:0: Compare Output Mode for Channel B
The COMnA1:0 and COMnB1:0 control the Output Compare pins (OCnA and OCnB respec-
tively) behavior. If one or both of the COMnA1:0 bits are written to one, the OCnA output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COMnB1:0 bit are written to one, the OCnB output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OCnA or OCnB pin must be set in order to enable the output driver.
When the OCnA or OCnB is connected to the pin, the function of the COMnx1:0 bits is depen-
dent of the WGMn3:0 bits setting.
when the WGMn3:0 bits are set to a Normal or a CTC mode (non-PWM).
Table 13-2.
Bit
(0x80)
Read/Write
Initial Value
COMnA1/COMnB1
and ICF n
(PC and PFC PWM)
TOVn
(CTC and FPWM)
(Update at TOP)
0
0
1
1
TCNTn
TCNTn
OCRnx
(clk
as TOP)
clk
clk
I/O
(FPWM)
I/O
Tn
/8)
(if used
COM1A1
Compare Output Mode, non-PWM
R/W
7
0
COM1A0
COMnA0/COMnB0
R/W
6
0
TOP - 1
TOP - 1
Old OCRnx Value
0
1
0
1
COM1B1
Table 13-2 on page 132
R/W
5
0
COM1B0
R/W
4
0
Description
Normal port operation, OCnA/OCnB disconnected.
Toggle OCnA/OCnB on Compare Match.
Clear OCnA/OCnB on Compare Match (Set output to
low level).
Set OCnA/OCnB on Compare Match (Set output to
high level).
TOP
TOP
ATmega164P/324P/644P
R
3
0
shows the COMnx1:0 bit functionality
BOTTOM
TOP - 1
clk_I/O
R
2
0
New OCRnx Value
/8)
WGM11
R/W
1
0
BOTTOM + 1
TOP - 2
WGM10
R/W
0
0
TCCR1A
132

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