AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet - Page 161

• Manufacturer Part Number: AT90PWM3B
• Manufacturer: Atmel Corporation

Specifications of AT90PWM3B

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 105
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 1
• Pwm Channels: 12
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.25 PSC Register Definition
16.25.1
16.25.2
16.25.3
4317J–AVR–08/10
PSC 0 Synchro and Output Configuration – PSOC0
PSC 1 Synchro and Output Configuration – PSOC1
PSC 2 Synchro and Output Configuration – PSOC2
Registers are explained for PSC0. They are identical for PSC1. For PSC2 only different registers
are described.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
• Bit 7 – POS23 : PSCOUT23 Selection (PSC2 only)
When this bit is clear, PSCOUT23 outputs the waveform generated by Waveform Generator B.
When this bit is set, PSCOUT23 outputs the waveform generated by Waveform Generator A.
• Bit 6 – POS22 : PSCOUT22 Selection (PSC2 only)
When this bit is clear, PSCOUT22 outputs the waveform generated by Waveform Generator A.
When this bit is set, PSCOUT22 outputs the waveform generated by Waveform Generator B.
• Bit 5:4 – PSYNCn1:0: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent to the ADC for
synchronization.
Table 16-11. Synchronization Source Description in One/Two/Four Ramp Modes
PSYNCn1
0
0
1
1
PSYNCn0
0
1
0
1
POS23
R/W
R/W
R/W
7
0
7
0
7
0
-
-
POS22
R/W
R/W
R/W
6
0
6
0
6
0
-
-
Description
Send signal on leading edge of PSCOUTn0 (match with OCRnSA)
Send signal on trailing edge of PSCOUTn0 (match with OCRnRA or
fault/retrigger on part A)
Send signal on leading edge of PSCOUTn1 (match with OCRnSB)
Send signal on trailing edge of PSCOUTn1 (match with OCRnRB or
fault/retrigger on part B)
PSYNC01
PSYNC11
PSYNC21
R/W
R/W
R/W
5
0
5
0
5
0
PSYNC00
PSYNC10
PSYNC20
R/W
R/W
R/W
4
0
4
0
4
0
POEN2D
R/W
R/W
R/W
3
0
3
0
3
0
-
-
AT90PWM2/3/2B/3B
POEN0B
POEN1B
POEN2B
R/W
R/W
R/W
2
0
2
0
2
0
POEN2C
R/W
R/W
R/W
1
0
1
0
1
0
-
-
POEN0A
POEN1A
POEN2A
R/W
R/W
R/W
0
0
0
0
0
0
PSOC0
PSOC1
PSOC2
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