AT89LP51RD2 Atmel Corporation, AT89LP51RD2 Datasheet - Page 24

• Manufacturer Part Number: AT89LP51RD2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51RD2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

3.5.2.2
24
AT89LP51RD2/ED2/ID2 Preliminary
Page Write
Figure 3-16. EEPROM Byte Write of Two Bytes
The LDPG bit in EECON prevents a write to the EEPROM from starting. While LDPG = 1 all
writes will load the temporary page buffer of the EEPROM. The next write to occur with
LDPG = 0 will write that byte and all previously loaded bytes to the EEPROM. The
AT89LP51ED2/ID2 has a EEPROM buffer of 32 bytes. Address locations that are not loaded will
remain untouched, i.e. no erase/write will occur.
The following procedure is used to write multiple bytes (up to 32) to the on-chip EEPROM. See
Figure
may not be loaded more than once. This procedure assumes N bytes will be written, where 2
≤ ≤ N ≤ 32.
1. If the write will occur within 2 ms of a reset or power-up event, check the INHIBIT flag
2. Check the EEBUSY flag (EECON.0) and wait for it to go low if necessary
3. Disable interrupts if any interrupt routine accesses external data memory in the range
4. Set bit EEE in EECON register
5. Set bit LDPG in EECON register
6. Load DPTR (or DPTRB) with the address to write
7. Load the accumulator (ACC) with the data to be written
8. Execute MOVX @DPTR, A (or MOVX @/DPTR, A)
9. Repeat steps 6–8 for the first N-1 bytes
10. Clear bit LDPG in EECON register
11. Load DPTR (or DPTRB) with the address of byte N. The page address is set by the
12. Load the accumulator (ACC) with the data to be written
13. Execute MOVX @DPTR, A (or MOVX @/DPTR, A)
14. Clear bit EEE in EECON register
15. Restore interrupts if disabled in #3
16. The EEBUSY flag is set by hardware to indicate that programming is in progress and
17. The end of programming is indicated by a hardware clear of EEBUSY
and wait for it to go high if necessary.
0000H–0FFFH
address of this byte
that the EEPROM is not available for reading and writing
3-17. All bytes must reside within the same 32-byte page boundary and the same byte
EEBUSY
MOVX
LDPG
EEE
t
WC
t
WC
3714A–MICRO–7/11