AT89LP51 Atmel Corporation, AT89LP51 Datasheet - Page 44

• Manufacturer Part Number: AT89LP51
• Manufacturer: Atmel Corporation

Specifications of AT89LP51

• Flash (kbytes): 4 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 36
• Uart: 1
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 3
• Isp: SPI
• Watchdog: Yes

10.1.4
10.2
44
Port Read-Modify-Write
AT89LP51/52
Push-pull Output
The push-pull output configuration has the same pull-down structure as both the open-drain and
the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port
latch contains a logic “1”. The push-pull mode may be used when more source current is needed
from a port output. The push-pull port configuration is shown in
Figure 10-5. Push-pull Output
A read from a port will read either the state of the pins or the state of the port register depending
on which instruction is used. Simple read instructions will always access the port pins directly.
Read-modify-write instructions, which read a value, possibly modify it, and then write it back, will
always access the port register. This includes bit write instructions such as CLR or SETB as they
actually read the entire port, modify a single bit, then write the data back to the entire port. See
Table 10-4
Table 10-4.
Mnemonic
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV PX.Y, C
CLR PX.Y
SETB PX.Y
Register
F rom P o r t
for a complete list of Read-Modify-Write instruction which may access the ports.
Port Read-Modify-Write Instructions
Instruction
Logical AND
Logical OR
Logical EX-OR
Jump if bit set and clear bit
Complement bit
Increment
Decrement
Decrement and jump if not zero
Move carry to bit Y of Port X
Clear bit Y of Port X
Set bit Y of Port X
Input
Data
PWD
V
CC
Figure
Example
ANL P1, A
ORL P1, A
XRL P1, A
JBC P3.0, LABEL
CPL P3.1
INC P1
DEC P3
DJNZ P3, LABEL
MOV P1.0, C
CLR P1.1
SETB P3.2
P o r t
Pin
10-5.
3709D–MICRO–12/11