AT89C5131A-L Atmel Corporation, AT89C5131A-L Datasheet - Page 6

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AT89C5131A-L

Manufacturer Part Number
AT89C5131A-L
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C5131A-L

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
48 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
1024
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 3.6
Timers
4
Isp
UART/USB
Watchdog
Yes
Signals
6
AT89C5131A-L
All the AT89C5131A-L signals are detailed by functionality on Table 1 through Table 12.
Table 1. Keypad Interface Signal Description
Table 2. Programmable Counter Array Signal Description
Table 3. Serial I/O Signal Description
Table 4. Timer 0, Timer 1 and Timer 2 Signal Description
KIN[7:0)
Signal
Signal
Signal
CEX[4:0]
Name
Name
Name
Signal
Name
INT0
INT1
RxD
TxD
ECI
Type
Type
Type
Type
O
I
I
I
I
I/O
I
Description
Keypad Input Lines
Holding one of these pins high or low for 24 oscillator periods triggers a
keypad interrupt if enabled. Held line is reported in the KBCON register.
Description
Serial Input
The serial input for Extended UART.
Serial Output
The serial output for Extended UART.
Description
Timer 0 Gate Input
INT0 serves as external run control for timer 0, when selected by GATE0
bit in TCON register.
External Interrupt 0
INT0 input set IE0 in the TCON register. If bit IT0 in this register is set, bits
IE0 are set by a falling edge on INT0. If bit IT0 is cleared, bits IE0 is set by
a low level on INT0.
Timer 1 Gate Input
INT1 serves as external run control for Timer 1, when selected by GATE1
bit in TCON register.
External Interrupt 1
INT1 input set IE1 in the TCON register. If bit IT1 in this register is set, bits
IE1 are set by a falling edge on INT1. If bit IT1 is cleared, bits IE1 is set by
a low level on INT1.
Description
External Clock Input
Capture External Input
Compare External Output
4338F–USB–08/07
Alternate
Function
Alternate
Function
Alternate
Function
Alternate
Function
P1[7:0]
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0
P3.1
P3.2
P3.3

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