AT89C5131A-L Atmel Corporation, AT89C5131A-L Datasheet - Page 57

• Manufacturer Part Number: AT89C5131A-L
• Manufacturer: Atmel Corporation

Specifications of AT89C5131A-L

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 48 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Sram (kbytes): 1.25
• Eeprom (bytes): 1024
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 3.6
• Timers: 4
• Isp: UART/USB
• Watchdog: Yes

4338F–USB–08/07
The CMOD register includes three additional bits associated with the PCA (See
Figure 28 and Table 48).
•
•
•
The CCON register contains the run control bit for the PCA and the flags for the PCA
timer (CF) and each module (see Table 49).
•
•
•
Table 49. CCON Register
CCON - PCA Counter Control Register (D8h)
Reset Value = 000X 0000b
Not bit addressable
Number
Bit
The CIDL bit allows the PCA to stop during idle mode.
The WDTE bit enables or disables the watchdog function on module 4.
The ECF bit when set causes an interrupt and the PCA overflow flag CF (in the
CCON SFR) to be set when the PCA timer overflows.
Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by
clearing this bit.
Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an
interrupt will be generated if the ECF bit in the CMOD register is set. The CF bit can
only be cleared by software.
Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1,
etc.) and are set by hardware when either a match or a capture occurs. These flags
can only be cleared by software.
7
6
5
4
3
2
1
0
CF
7
Mnemonic Description
CCF4
CCF3
CCF2
CCF1
CCF0
Bit
CF
CR
–
CR
6
PCA Counter Overflow flag
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in
CMOD is set. CF may be set by either hardware or software but can only be cleared
by software.
PCA Counter Run control bit
Must be cleared by software to turn the PCA counter off.
Set by software to turn the PCA counter on.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Module 4 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 3 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 2 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 1 Interrupt Flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 0 Interrupt Flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
5
–
CCF4
4
CCF3
3
CCF2
2
CCF1
1
CCF0
0
57