AT32UC3L0128 Atmel Corporation, AT32UC3L0128 Datasheet - Page 238

• Manufacturer Part Number: AT32UC3L0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.6.25
Name:
Access Type:
Reset Value:
• PLLCOUNT: PLL Count
• PLLMUL: PLL Multiply Factor
• PLLDIV: PLL Division Factor
• PLLOPT: PLL Option
• PLLOSC: PLL Oscillator Select
32145A–12/2011
31
23
15
7
-
-
-
-
Specifies the number of RCSYS clock cycles before ISR.PLLLOCKn will be set after PLLn has been written, or after PLLn has
been automatically re-enabled after exiting a sleep mode.
These fields determine the ratio of the PLL output frequency to the source oscillator frequency:
f
f
Note that the PLLMUL field should always be greater than 1 or the behavior of the PLL will be undefined.
PLLOPT[0]: Selects the VCO frequency range (f
0: 80MHz<f
1: 160MHz<f
PLLOPT[1]: Divides the output frequency by 2.
0: f
1: f
PLLOPT[2]:Wide-Bandwidth mode.
0: Wide Bandwidth Mode enabled
1: Wide Bandwidth Mode disabled
Reference clock source select for the reference clock, please refer to the “PLL Clock Sources” table in the SCIF
Module Configuration section for details.
vco
vco
PLL Control Register
PLL
PLL
= (PLLMUL+1)/PLLDIV • f
= 2•(PLLMUL+1) • f
= f
= f
vco
vco
vco
/2
vco
<180MHz
30
22
14
<240MHz
PLLn
Read/Write
0x00000000
6
-
-
-
-
REF
if PLLDIV = 0
REF
29
21
13
5
-
-
if PLLDIV >0
PLLOPT
28
20
12
4
-
-
vco
).
27
19
11
3
PLLCOUNT
26
18
10
2
AT32UC3L0128/256
PLLMUL
PLLOSC
PLLDIV
25
17
9
1
PLLEN
24
16
8
0
238