AT32UC3A4128 Atmel Corporation, AT32UC3A4128 Datasheet - Page 49
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AT32UC3A4128
Manufacturer Part Number
AT32UC3A4128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4128
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 49 of 377
- Download datasheet (5Mb)
5.3.3.4
32000D–04/2011
DTLB Modified
This exception is issued if a valid memory write operation is performed to a page that has never
been written before. This is detected by the Dirty-bit in the matching TLB entry reading zero.
1. Examine the TLBEAR and TLBEHI registers in order to identify the page that caused
2. Set the Dirty bit in the read page table entry and write this entry back to the page table
3. Use the fetched page table entry to update the necessary bits in PTEHI and PTELO.
4. The TLBEHI[I] register is updated by hardware to indicate that it was a DTLB miss.
5. Execute the tlbw instruction in order to update the TLB entry.
6. Finish the exception handling and return to the application by executing the rete
the fault. Use this to index the page table pointed to by PTBR and fetch the desired
page table entry.
The following bits must be updated: V, PFN, C, G, B, AP[2:0], SZ[1:0], W, D.
Ensure that MMUCR[DRP] points to the TLB entry to replace. An entry for the faulting
page must already exist in the DTLB, and MMUCR[DRP] must point to this entry, other-
wise multiple DTLB hits may occur.
instruction.
AVR32
49
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