AT32UC3A364S Atmel Corporation, AT32UC3A364S Datasheet - Page 867
AT32UC3A364S
Manufacturer Part Number
AT32UC3A364S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A364S
Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364S-ALUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 867 of 1012
- Download datasheet (16Mb)
Figure 31-5. Communication example
31.6.3
32072G–11/2011
Parallel Interface Mode Setting Procedure
sources can be cleared by setting corresponding bit in ISCR but DRQ which is cleared once
FIFO has been read/written.
Host controller supports parallel mode and must be set to parallel interface mode after the Mem-
ory Stick.
– Identify the Memory Stick media and confirm it is a Memory Stick PRO. For Memory
– Set the Memory Stick to parallel interface mode by executing TPC commands
– Write SRAC=0 and REI=0 to the system register (SYS) to switch host controller to
– Change serial clock (SCLK) while communication is not being performed with the
stick media identification, see “Memory Stick Standard Format Specifications ver.
1.X Appendix D” or “Memory Stick Standard Format Specifications ver. 2.0
Application Notes 1.3 Media Identification Process”.
SET_R/W_REG_ADRS then WRITE_REG to set System Parameter bit PAM=1.
parallel interface mode.
Memory Stick.
FIFO direction setting
Interrupt enable
Interrupt clear
Interrupt clear
Write to FIFO
Interrupt wait
Interrupt wait
TPC setting
CPU
PEND=1, MSINT=1
TPC = SET_CMD
MSISR.MSINT=1
MSISR.PEND=1
MSINT=1
PEND=1
FDIR=1
CMD
MSISCR register
MSISCR register
MSCMD register
MSSYS register
MSDAT register
MSIER register
Protocol start
Protocol end
INT received
MS INT wait
MSI
Communication
with Memory Stick
INT from
Memory Stick
867
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