AT32UC3A364S Atmel Corporation, AT32UC3A364S Datasheet - Page 190

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AT32UC3A364S

Manufacturer Part Number
AT32UC3A364S
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A364S

Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364S-ALUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
32072G–11/2011
•Write is controlled by NCS (MODE.WRITEMODE = 0)
Figure 15-13. WRITEMODE = 1. The Write Operation Is Controlled by NWE
Figure 15-14 on page 190
written to zero. The data is put on the bus during the pulse and hold steps of the NCS signal.
The internal data buffers are turned out after the NCSWRSETUP time, and until the end of the
write cycle, regardless of the programmed waveform on NWE.
Figure 15-14. WRITEMODE = 0. The Write Operation Is Controlled by NCS
A[AD_MSB:2]
A[AD_MSB:2]
NWR0, NWR1
NWR0, NWR1
NBS0, NBS1,
NBS0, NBS1,
A0, A1
A0, A1
CLK_SMC
CLK_SMC
NWE,
D[15:0]
NWE,
D[15:0]
NCS
NCS
shows the waveforms of a write operation with MODE.WRITEMODE
190

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