AT32UC3A364S Atmel Corporation, AT32UC3A364S Datasheet - Page 559

• Manufacturer Part Number: AT32UC3A364S
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A364S

• Flash (kbytes): 64 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: AES
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 25-17. ASK Modulator Output
Figure 25-18. FSK Modulator Output
25.6.3.6
32072G–11/2011
Uptstream Frequency F0
Uptstream Frequencies
unipolar output
FSK Modulator
ASK Modulator
default polarity
[F0, F0+offset]
unipolar output
default polarity
NRZ stream
NRZ stream
Manchester
Manchester
encoded
Synchronous Receiver
encoded
Output
Output
data
data
Txd
Txd
1
1
does a bit-checking search for valid patterns before it switches to a receiving mode and forwards
data to the decoder. Defining preambles to help distinguish between noise and valid data has to
be done in conjunction with the RF module, and may sometimes be filtered away from the endec
stream. Using the ASK modulation scheme, a one is transmitted as a RF signal at the down-
stream frequency, while a zero is transmitted as no signal. See
modulation scheme uses two different frequencies to transmit data. A one is sent as a signal on
one frequency, and a zero on the other. See
In synchronous mode (SYNC=1), the receiver samples the RXD signal on each rising edge of
the Baud Rate Clock. If a low level is detected, it is considered as a start bit. Configuration bits
and fields are the same as in asynchronous mode.
Figure 25-19. Synchronous Mode Character Reception
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
Clock
RXD
Start
0
0
D0
D1
D2
Figure
0
0
D3
25-18.
D4
D5
D6
Figure 25-17
D7
1
1
Parity Bit
Stop Bit
The FSK
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