PC87109VBE Nuvoton Technology Corporation of America, PC87109VBE Datasheet - Page 22

• Manufacturer Part Number: PC87109VBE
• Description: IC CONTROLLER ADV UART 32-LQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of PC87109VBE

• Features: Transmit Deferral
• Number Of Channels: 2, DUART
• Fifo's: 16 Byte
• Voltage - Supply: 5V
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *PC87109VBE

BSR - Bank Select Register
When bit 7 is 1, bits 0-6 of BSR are used to select the bank. The encoding are shown in Table 3-4.
3.1.5 MCR - Mode Control Register
Used to control the device operational mode. The function of this register changes depending upon whether the device is in
extended or non-extended mode. In extended mode the interrupt output signal is always enabled. Loop-back can be selected by
setting bit 4 of the EXCR1 register. Upon reset, all bits are set to 0.
Non-Extended Mode
The format of the non-extended mode MCR is shown in figure 3-7.
Bits
Function
Reset State
B6
B7
B0-2
B3
Reserved.
Read/Write as 0.
ISEN - Interrupt Signal Enable
In normal operation this bit controls the interrupt signal, and it must be set to 1 in order to enable it.
Note: New programs should always keep this bit set to 1 during normal operation. The interrupt signal should be
controlled through the device configuration logic.
SBRK - Set Break.
When set to 1, the following occurs:
Setting this bit to 0 disables the break. This bit acts only on the transmitter front-end and has no effect on the rest
of the transmitter logic.
The following sequence should be followed to avoid transmission of erroneous characters because of the break.
1. Wait for the transmitter to be empty (TXEMP = 1).
2. Set SBRK to 1
3. Wait for the transmitter to be empty and clear SBRK when normal transmission has to be restored.
During the break, the transmitter can be used as a character timer to accurately establish the break duration.
BKSE - Bank Select Enable.
In the LCR register this bit is always 0.
If UART mode is selected, the SOUT pin is forced to logic 0 state.
If SIR mode is selected, pulses are issued continuously on the IRTX pin.
If Sharp-IR mode is selected and internal modulation is enabled, pulses are issued continuously on the IRTX pin.
If Sharp-IR mode is selected and internal modulation is disabled, the IRTX pin is forced to a logic 1 state.
B7
0
-
B6
Figure 3-7. Mode Control Register, Non-Extended Mode
0
-
7 6 5 4 3
0
1 0
1 1
1 1
1 1 1 0 0
1 1 1 0 0
1 1 1 0 1
1 1 1 0 1
1 1 1 1 0
1 1 1 1 0
1 1 1 1 1
1 1 0
x
Table 3-4. Bank Selection Encoding
x
x
x
x
B5
0
-
BSR Bits
x
x
x
x
x
x
x
x
x
x
2 1
x x
x x
x 1
x x
0 0
1 0
0 0
1 0
0 0
1 0
x 0
x 0
LOOP
B4
22
0
0
1
0
0
0
0
0
0
0
0
x
x
x
Reserved
Reserved
Selected
ISEN
Bank
B3
0
0
1
1
1
2
3
4
5
6
7
res
B2
0
res
B1
0
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res
B0
0