PSB 21393 H V1.3 Infineon Technologies, PSB 21393 H V1.3 Datasheet - Page 97

• Manufacturer Part Number: PSB 21393 H V1.3
• Description: IC CODEC W/TRANSCEIVER MQFP-44
• Manufacturer: Infineon Technologies
• Series: SCOUT™r

Specifications of PSB 21393 H V1.3

• Function: CODEC
• Interface: IOM-2, SCI, UPN
• Number Of Circuits: 1
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 27mA
• Mounting Type: Surface Mount
• Package / Case: 44-BQFP
• Includes: Activation and Deactivation, Channel Handler, DTMF / Tone / Ringing Generator, HDLC Controller, Speakerphone, UPN Transceiver
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Operating Temperature: -
• Other names: PSB21393HV1.3XT; PSB21393HV13XP; SP000007533; SP000007534

3.1.1
Characteristics:
All frames with valid addresses are accepted and the bytes following the address are
transferred to the P via RFIFO.
3.1.2
Characteristics:
Every received frame is stored in RFIFO (first byte after opening flag to CRC field).
3.1.3
Characteristics:
A comparison is performed on the first byte after the opening flag with SAP1, SAP2 and
“group” SAPI (FE
3.1.4
Characteristics:
A comparison is performed only on the second byte after the opening flag, with TEI1,
TEI2 and group TEI (FF
3.1.5
Characteristics:
In extended transparent mode fully transparent data transmission/reception without
HDLC framing is performed i.e. without FLAG generation/recognition, CRC generation/
check, bitstuffing mechanism. This allows user specific protocol variations.
Also refer to chapter 3.5.
Data Sheet
Non-Auto Mode (MDS2-0 = ’01x’)
Transparent Mode 0 (MDS2-0 = ’110’).
Transparent Mode 1 (MDS2-0 = ’111’).
Transparent Mode 2 (MDS2-0 = ’101’).
Extended Transparent Mode (MDS2-0 = ’100’).
H
/FC
Full address recognition with one-byte (MDS = ’010’) or
two-byte (MDS = ’011’) address comparison
no address recognition
SAPI recognition
TEI recognition
fully transparent
H
H
). In the case of a match, all following bytes are stored in RFIFO.
). In case of a match the rest of the frame is stored in the RFIFO.
87
HDLC Controller
PSB 21391
PSB 21393
2001-03-07