PSB 21393 H V1.3 Infineon Technologies, PSB 21393 H V1.3 Datasheet - Page 174

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PSB 21393 H V1.3

Manufacturer Part Number
PSB 21393 H V1.3
Description
IC CODEC W/TRANSCEIVER MQFP-44
Manufacturer
Infineon Technologies
Series
SCOUT™r
Datasheet

Specifications of PSB 21393 H V1.3

Function
CODEC
Interface
IOM-2, SCI, UPN
Number Of Circuits
1
Voltage - Supply
3.3V, 5V
Current - Supply
27mA
Mounting Type
Surface Mount
Package / Case
44-BQFP
Includes
Activation and Deactivation, Channel Handler, DTMF / Tone / Ringing Generator, HDLC Controller, Speakerphone, UPN Transceiver
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Operating Temperature
-
Other names
PSB21393HV1.3XT
PSB21393HV13XP
SP000007533
SP000007534
Data Sheet
7
The register mapping is shown in Figure 82.
Figure 82
Register Mapping
The register address range from 00-1F
address range. The address range 20-2F
handler. The register set ranging from 30-3F
general configuration registers. The address range from 40-59
handler with the registers for timeslot and data port selection (TSDP) and the control
registers (CR) for the codec data (CO), transceiver data (TR), Monitor data (MON),
HDLC/CI data (HCI) and controller access data (CDA), serial data strobe signal (SDS),
IOM interface (IOM) and synchronous transfer interrupt (STI). The address range from
5C-5F
codec coefficient RAM (CRAM) are assigned to the address range 60-6F
respectively.
The register summaries are shown in the following tables containing the abbreviation of
the register name and the register bits, the register address, the reset values and the
register type (Read/Write). A detailed register description follows these register
summaries. The register summaries and the description are sorted in ascending order
of the register address.
H
pertains to the MONITOR handler. The codec configuration registers and the
Detailed Register Description
FF
80
70
60
40
30
20
00
H
H
H
H
H
H
H
H
Transc., Interrupt, Mode Reg.
Codec Coefficient RAM
Reserved
Codec Configuration
IOM Handler (CDA, TSDP,
CR, STI), MONITOR Register
HDLC Control, CI Reg.
HDLC RFIFO/XFIFO
H
is assigned to the two FIFOs having an identical
H
164
pertains to the HDLC controller and the CI
H
pertains to the transceiver, interrupt and
Detalled Register Description
H
is assigned to the IOM
PSB 21391
PSB 21393
H
2001-03-07
or 80-FF
H

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