PSB2163T-V31TR Infineon Technologies, PSB2163T-V31TR Datasheet - Page 8

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PSB2163T-V31TR

Manufacturer Part Number
PSB2163T-V31TR
Description
IC AUDIO RINGING CODEC 28-PDSO
Manufacturer
Infineon Technologies
Series
ARCOFI®r
Datasheet

Specifications of PSB2163T-V31TR

Function
CODEC Filter
Interface
IOM-2, PCI, Serial
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
900µA
Power (watts)
1mW
Operating Temperature
-25°C ~ 80°C
Mounting Type
Surface Mount
Package / Case
DSO-28
Includes
Activation and Deactivation, B-Channel and D-Channel HDLC Controllers, D-Channel Priority Handler, Monitor Channel Handler
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
PSB2163T-V31INTR
PSB2163T-V31TR
Table of Symbols
AD
A/D
ADI
AFE
AGCX
AGCR
AHO
AIMX
ALC
ALF
ALI
ALN
ALS
ALTF
ALZ
AMI
ARCOFI
ASP
BM
BT
CAM
CCITT
CG
CMDR
COP
CR
CRAM
CS
D/A
DCE
DCL
DCLK
DD
DEC
DHON
DHOP
DHPR
DHPX
DLN
DLP
Semiconductor Group
Address of the ARCOFI (IOM-2 mode)
Analog to Digital converter
ARCOFI Digital Interface
Analog Front End
Automatic Gain Control Transmit
Automatic Gain Control Receive
Handset Output Amplifier
Analog Input Multiplexer control bits (ATCR)
Analog Loop via Converter (TFCR)
Analog Loop via Front End (TFCR)
Analog Loop via Interface (TFCR)
Analog Loop via Noise Shaper (TFCR)
Loudspeaker Amplifier
Analog Loop & Test Function bits (TFCR)
Analog Loop via Z-side tone gain stage
Microphone Amplifier
Audio Ringing Codec Filter
ARCOFI Signal Processor
Beat Mode bit (TGCR)
Beat Tone bit (TGCR)
Chip Address Mode bit (IOM-2 two chip mode; GCR)
International Telegraph and Telephone Consultative Committee
Control Generator bit (TGCR)
Command Register
Coefficient Operation (CMDR)
Configuration Register
Coefficient RAM
Chip Select active low (serial control interface)
Digital to Analog converter
Double Clock Enable at DCLK pin (SDICR)
IOM-2 interface clock
Data Clock pin (serial data interface)
IOM-2 Data Downstream pin
Decimation filter
Disable pin HON (XCR)
Disable pin HOP (XCR)
Disable High Pass Receive bit (PFCR)
Disable High Pass Transmit bit (PFCR)
Digital Loop via Noise Shaper (TFCR)
Digital Loop via PCM-register (TFCR)
9
General Information

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