SI3050-KT Silicon Laboratories Inc, SI3050-KT Datasheet - Page 70

IC VOICE DAA GCI/PCM/SPI 20TSSOP

SI3050-KT

Manufacturer Part Number
SI3050-KT
Description
IC VOICE DAA GCI/PCM/SPI 20TSSOP
Manufacturer
Silicon Laboratories Inc
Type
Chipsetr
Datasheets

Specifications of SI3050-KT

Package / Case
20-TSSOP
Function
Data Access Arrangement (DAA)
Interface
PCM, Serial, SPI
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
8.5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Includes
Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
Product
Modem Chip
Supply Voltage (min)
3 V
Supply Current
8.5 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

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Si3050
Register 17. International Control 2
Reset settings = 0000_0000
70
Name CALZ MCAL CALD
Type
Bit
Bit
7
6
5
4
3
2
1
0
MCAL
R/W
Name
CALD
CALZ
ROV
OPE
D7
BTE
BTD
RT2
R/W
D6
Clear ADC Calibration.
0 = Normal operation.
1 = Clears the existing ADC calibration data. This bit must be written back to 0 after being set.
Manual ADC Calibration.
0 = No calibration.
1 = Initiate manual ADC calibration.
Auto-Calibration Disable.
0 = Enable auto-calibration.
1 = Disable auto-calibration.
Ringer Threshold Select 2.
This bit, in combination with the RT bit, is used to satisfy country requirements on ring detec-
tion. Signals below the lower level do not generate a ring detection; signals above the upper
level are guaranteed to generate a ring detection.
RT
0
0
1
1
Overload Protect Enable.
0 = Disabled.
1 = Enabled.
The OPE bit should always be cleared before going off-hook.
Billing Tone Detect Enable.
When set, the DAA can detect a billing tone signal on the line and maintain off-hook through
the billing tone. If a billing tone is detected, the BTD bit (Register 17) is set to indicate the
event. Writing this bit to zero clears the BTD bit.
0 = Billing tone detection disabled. The BTD bit is not functional.
1 = Billing tone detection enabled. The BTD bit is not functional.
Receive Overload.
This bit is set when the receive input has an excessive input level (i.e., receive pin goes below
ground). Writing a 0 to this location clears this bit and the ROVI bit (Register 4, bit 6).
0 = Normal receive input level.
1 = Excessive receive input level.
Billing Tone Detected.
This bit is set if a billing tone is detected. Writing a zero to BTE clears this bit.
0 = No billing tone detected.
1 = Billing tone detected.
R/W
D5
RT2
R/W
D4
RT2
0
1
0
1
OPE
R/W
D3
13.5 V
Reserved, do not use this setting.
19.35 V
40.5 V
RT Lower level
BTE
R/W
D2
Rev. 1.0
rms
rms
rms
ROV
R/W
D1
Function
BTD
D0
R
RT Upper level
16.5 V
23.65 V
49.5 V
rms
rms
rms

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