SI3050-KT Silicon Laboratories Inc, SI3050-KT Datasheet - Page 34

• Manufacturer Part Number: SI3050-KT
• Description: IC VOICE DAA GCI/PCM/SPI 20TSSOP
• Manufacturer: Silicon Laboratories Inc
• Type: Chipsetr

Specifications of SI3050-KT

• Package / Case: 20-TSSOP
• Function: Data Access Arrangement (DAA)
• Interface: PCM, Serial, SPI
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 8.5mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Includes: Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
• Product: Modem Chip
• Supply Voltage (min): 3 V
• Supply Current: 8.5 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Si3050
off-hook, use the following procedure (also see
Figure 24):
1. The Caller Alert Signal (CAS) tone is sent from the central
2. The DAA must check if there is another parallel device on
Notes:
34
RCALD Bit
FOH[1] Bit
FOH[0] Bit
CALD Bit
office (CO) and is digitized along with the line data. The
host processor detects the presence of this tone.
the same line, which is accomplished by briefly going
on-hook, measuring the line voltage, and returning to an
off-hook state.
1. The off-hook counter and calibrations prevent transmission or reception of data for 402.75 ms (default) for the line
2. The caller alert signal (CAS) tone transmits from the CO to signal an incoming call.
3. The device is taken on-hook to read the line voltage in the LVS bits to detect parallel handsets. In this mode, no data is
4. When the device returns off-hook, the normal off-hook counter is reduced to 8 ms. If the CALD and RCALD bits are set,
5. After allowing the off-hook counter to expire (8 ms), normal transmission and reception can continue. If CID data
a. Set the CALD bit (Register 17
b. Set the RCALD bit (
c. Set the FOH[1:0] bits (Register 31 bits 6:5) to 11 to
d. Clear the OH bit (
e. Read the LVS bits to determine the state of the line. If
OH Bit
calibration that automatically occurs when going
off-hook.
resistor calibration that automatically occurs when
going off-hook
reduce the time period for the off-hook counter to 8 ms
allowing compliance to the Type II CID timing
requirements.
DAA into an on-hook state. The RXM bit
(Register 15
path.
the LVS bits read the typical on-hook line voltage, then
there are no parallel devices active on the line, and
CID data reception can be continued. If the LVS bits
read well below the typical on-hook line voltage, then
there are one or more devices present and active on
the same line that are not compliant with Type II CID.
Do not continue CID data reception.
voltage to settle.
transmitted on the DTX pin.
then the automatic calibrations are not performed.
reception is required, send the appropriate signal to the CO at this time.
LINE
On-Hook
, bit
3) also can be set to mute the receive
Register
Figure 24. Implementing Type II Caller ID on the Si3050/19
Register
(402.75 ms nominally)
Off-Hook Counter
and Calibration
5
, bit
, bit
25
, bit
1
0). This puts the
5) to disable the
5) to disable the
Of f -Hook
Rev. 1.0
3. The CO then responds with CID data after receiving the
4. The muting of the upstream data path by the host
5. The CALD and the RCALD bits can be cleared to
Because of the nature of the low-power ADC, the data
presented on DTX can have up to a 10% dc offset. The
caller ID decoder must either use a high-pass or a
band-pass filter to accurately retrieve the caller ID data.
CA S Tone
Received
CID data, the host processor unmutes the upstream data
output and continues with normal operation.
processor mutes the handset in a telephone application so
the user cannot hear the acknowledgement tone and CID
data being sent.
re-enable the automatic calibrations when going off-hook.
The FOH[1:0] bits also can be programmed to 01 to
restore the default off-hook counter time.
f. Set the OH bit to return to an off-hook state.
Immediately after returning to an off-hook state, the
off-hook counter must be allowed to expire. This allows
the line voltage to settle before transmitting or
receiving data. After 8 ms normal data transmission
and reception can begin. If a non-compliant parallel
device is present, then a reply tone is not sent by the
host tone generator and the CO does not send the CID
data. If all devices on the line are Type II CID
compliant, then the host must mute its upstream data
output to avoid the propagation of its reply tone and the
subsequent CID data. When muting its upstream data
output, the host processor should return an
acknowledgement (ACK) tone to the CO requesting
transmission of CID data.
2
On-Hook
3
Off-Hook Counter
(8 ms)
4
Of f -Hook
A ck
5