SI3050-KT Silicon Laboratories Inc, SI3050-KT Datasheet - Page 35

IC VOICE DAA GCI/PCM/SPI 20TSSOP

SI3050-KT

Manufacturer Part Number
SI3050-KT
Description
IC VOICE DAA GCI/PCM/SPI 20TSSOP
Manufacturer
Silicon Laboratories Inc
Type
Chipsetr
Datasheets

Specifications of SI3050-KT

Package / Case
20-TSSOP
Function
Data Access Arrangement (DAA)
Interface
PCM, Serial, SPI
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
8.5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Includes
Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
Product
Modem Chip
Supply Voltage (min)
3 V
Supply Current
8.5 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

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Part Number
Manufacturer
Quantity
Price
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Overload Detection
The Si3050 can be programmed to detect an overload
condition that exceeds the normal operating power
range of the DAA circuit. To use the overload detection
feature, the following steps should be followed:
1. Set the OH bit (Register 5, bit 0) to go off-hook, and wait
2. Enable overload detection by then setting the OPE bit
If the DAA senses an overload situation it automatically
presents an 800 Ω impedance to the line to reduce the
hookswitch current. At this time, the DAA also sets the
OPD bit (Register 19, bit 0) to indicate that an overload
condition exists. The line current detector within the
DAA has a threshold that is dependent on the ILIM bit
(Register 26). When ILIM = 0, the overload detection
threshold equals 160 mA. When ILIM = 1, the overload
detection threshold equals 60 mA. The OPE bit should
always be cleared before going off-hook.
Si3050
SDO
25 ms to allow line transients to settle.
(Register 17, bit 3).
SDI
To
Digital
Filter
IIRE
Link
TGA2
TXG2
RGA3
RXG3
Figure 25. Si3018/19 Signal Flow Diagram
Figure 26. Si3050 Signal Flow Diagram
TGA3
TXG3
RGA2
RXG2
DAC
ADC
5/200 Hz
Digital
Filter
IIRE
Rev. 1.0
Pole
LPF
Gain Control
The Si3050 supports multiple levels of gain and
attenuation for the transmit and receive paths.
The TXG2 and RXG2 bits (Registers 38–39) enable
gain or attenuation in 1 dB increments for the transmit
and receive paths (up to 12 dB gain and 15 dB
attenuation). The TGA2 and RGA2 bits select either
gain or attenuation. The TXG3 and RXG3 bits
(Registers 40–41) enable gain or attenuation in 0.1 dB
increments up to 1.5 dB for the transmit and receive
paths. The TGA3 and RGA3 bits select either gain or
attenuation. The transmit and receive paths can be
individually muted with the TXM and RXM bits
(Register 15). The signal flow through the Si3050 and
the Si3018/19 is shown in Figures 25–26.
Analog
Hybrid
Digital
Hybrid
ACT
Link
TX
Si3050
To
Si3018/19
CO
35

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