C8051F317-GMR Silicon Laboratories Inc, C8051F317-GMR Datasheet - Page 61

• Manufacturer Part Number: C8051F317-GMR
• Description: MCU 8-Bit C8051F31x 8051 CISC 16KB Flash 3.3V 24-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F317-GMR

• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F31x
• Maximum Speed: 25 MHz
• Ram Size: 1.25 KB
• Program Memory Size: 16 KB
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 21
• Interface Type: I2C/SMBus/SPI/UART
• On-chip Adc: 17-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 4

5.4.
The ADC Programmable Window Detector continuously compares the ADC0 output registers to user-pro-
grammed limits, and notifies the system when a desired condition is detected. This is especially effective in
an interrupt-driven system, saving code space and CPU bandwidth while delivering faster system
response times. The window detector interrupt flag (AD0WINT in register ADC0CN) can also be used in
polled mode. The ADC0 Greater-Than (ADC0GTH, ADC0GTL) and Less-Than (ADC0LTH, ADC0LTL)
registers hold the comparison values. The window detector flag can be programmed to indicate when mea-
sured data is inside or outside of the user-programmed limits, depending on the contents of the ADC0
Less-Than and ADC0 Greater-Than registers.
Bits7–0: High byte of ADC0 Greater-Than Data Word.
Bits7–0: Low byte of ADC0 Greater-Than Data Word.
R/W
R/W
Bit7
Bit7
Programmable Window Detector
SFR Definition 5.7. ADC0GTH: ADC0 Greater-Than Data High Byte
SFR Definition 5.8. ADC0GTL: ADC0 Greater-Than Data Low Byte
R/W
R/W
Bit6
Bit6
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.7
R/W
R/W
Bit3
Bit3
C8051F310/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
11111111
11111111
0xC4
0xC3
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