C8051F317-GMR Silicon Laboratories Inc, C8051F317-GMR Datasheet - Page 124

• Manufacturer Part Number: C8051F317-GMR
• Description: MCU 8-Bit C8051F31x 8051 CISC 16KB Flash 3.3V 24-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F317-GMR

• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F31x
• Maximum Speed: 25 MHz
• Ram Size: 1.25 KB
• Program Memory Size: 16 KB
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 21
• Interface Type: I2C/SMBus/SPI/UART
• On-chip Adc: 17-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 4

C8051F310/1/2/3/4/5/6/7
12.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crys-
tal/resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 12.1. A
10 Mresistor also must be wired across the XTAL2 and XTAL1 pins for the crystal/resonator configura-
tion. In RC, capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 pin as
shown in Option 2, 3, or 4 of Figure 12.1. The type of external oscillator must be selected in the OSCXCN
register, and the frequency control bits (XFCN) must be selected appropriately (see SFR Definition 12.4).
Important Note on External Oscillator Usage: Port pins must be configured when using the external
oscillator circuit. When the external oscillator drive circuit is enabled in crystal/resonator mode, Port pins
P0.2 and P0.3 are used as XTAL1 and XTAL2 respectively. When the external oscillator drive circuit is
enabled in capacitor, RC, or CMOS clock mode, Port pin P0.3 is used as XTAL2. The Port I/O Crossbar
should be configured to skip the Port pins used by the oscillator circuit; see
Section “13.1. Priority Cross-
bar Decoder” on page 131
for Crossbar configuration. Additionally, when using the external oscillator cir-
cuit in crystal/resonator, capacitor, or RC mode, the associated Port pins should be configured as analog
inputs. In CMOS clock mode, the associated pin should be configured as a digital input. See
Section
“13.2. Port I/O Initialization” on page 133
for details on Port input mode selection.
12.3. System Clock Selection
The CLKSL0 bit in register CLKSEL selects which oscillator is used as the system clock. CLKSL0 must be
set to ‘1’ for the system clock to run from the external oscillator; however the external oscillator may still
clock certain peripherals (timers, PCA) when the internal oscillator is selected as the system clock. The
system clock may be switched on-the-fly between the internal and external oscillator, so long as the
selected oscillator is enabled and has settled. The internal oscillator requires little start-up time and may be
selected as the system clock immediately following the OSCICN write that enables the internal oscillator.
External crystals and ceramic resonators typically require a start-up time before they are settled and ready
for use as the system clock. The Crystal Valid Flag (XTLVLD in register OSCXCN) is set to ‘1’ by hardware
when the external oscillator is settled. To avoid reading a false XTLVLD, in crystal mode software
should delay at least 1 ms between enabling the external oscillator and checking XTLVLD. RC and
C modes typically require no startup time.
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