LMP90077MHENOPB National Semiconductor, LMP90077MHENOPB Datasheet - Page 39

• Manufacturer Part Number: LMP90077MHENOPB
• Description: IC AFE 16BIT 214.6SPS 28-TSSOP
• Manufacturer: National Semiconductor
• Series: -r

Specifications of LMP90077MHENOPB

• Number Of Bits: 16
• Number Of Channels: 2 Differential, 4 Single-Ended
• Power (watts): -
• Voltage - Supply, Analog: 2.85 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: LMP90077MHENOPBTR

17.0 Applications Information
17.1 QUICK START
This section shows step-by-step instructions to configure the
LMP900xx to perform a simple DC reading from CH0.
1.
2.
3.
4.
5.
6.
7.
8.
17.2 CONNECTING THE SUPPLIES
17.2.1 VA and VIO
Any ADC architecture is sensitive to spikes on the analog
voltage, VA, digital input/output voltage, VIO, and ground
pins. These spikes may originate from switching power sup-
plies, digital logic, high power devices, and other sources. To
diminish these spikes, the LMP900xx’s VA and VIO pins
should be clean and well bypassed. A 0.1 µF ceramic bypass
capacitor and a 1 µF tantalum capacitor should be used to
bypass the LMP900xx supplies, with the 0.1 µF capacitor
placed as close to the LMP900xx as possible.
Since the LMP900xx has both external VA and VIO pins, the
user has two options on how to connect these pins. The first
option is to tie VA and VIO together and power them with the
same power supply. This is the most cost effective way of
powering the LMP900xx but is also the least ideal because
noise from VIO can couple into VA and negatively affect per-
formance. The second option involves powering VA and VIO
with separate power supplies. These supply voltages can
have the same amplitude or they can be different.
17.2.2 VREF
Operation with VREF below VA is also possible with slightly
diminished performance. As VREF is reduced, the range of
acceptable analog input voltages is also reduced. Reducing
the value of VREF also reduces the size of the LSB. When
the LSB size goes below the noise floor of the LMP900xx, the
noise will span an increasing number of codes and perfor-
mance will degrade. For optimal performance, VREF should
Apply VA = VIO = VREFP1 = 5V, and ground VREFN1
Apply VINP = ¾VREF and VINN = ¼VREF for CH0.
Thus, set CH0 = VIN = VINP - VINN = ½VREF
(CH0_INPUTCN register)
Set gain = 1 (CH0_CONFIG: GAIN_SEL = 0x0)
Exclude the buffer from the signal path (CH0_CONFIG:
BUF_EN = 1)
Set the background to BgcalMode2 (BGCALCN = 0x2)
Select VREF1 (CH0_INPUTCN: VREF_SEL = 0)
To use the internal CLK, set CLK_EXT_DET = 1 and
CLK_SEL = 0.
Follow the register read/write protocol
capture ADC_DOUT from CH0.
(Figure
19) to
39
be the same as VA and sourced with a clean source that is
bypassed with a ceramic capacitor value of 0.1 µF and a tan-
talum capacitor of 10 µF.
LMP900xx also allows ratiometric connection for noise im-
munity reasons. A ratiometric connection is when the ADC’s
VREFP and VREFN are used to excite the input device’s (i.e.
a bridge sensor) voltage references. This type of connection
severely attenuates any VREF ripple seen the ADC output,
and is thus strongly recommended.
17.3 ADC_DOUT CALCULATION
The output code of the LMP900xx can be calculated as:
ADC_DOUT is in 16−bit two's complement binary format. The
largest positive value is 0x7FFF (or 32767 in decimal), while
the largest negative value is 0x8000 (or 32768 in decimal). In
case of an over range the value is automatically clamped to
one of these two values.
Figure 30
analog input voltage, VIN, using the equation above.
FIGURE 30. ADC_DOUT vs. VIN of a 16-Bit Resolution
shows the theoretical output code, ADC_DOUT, vs.
Equation 1 — Output Code
(VREF = 5.5V, Gain = 1).
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