MT47H16M16FG-37E Micron Technology Inc, MT47H16M16FG-37E Datasheet - Page 106

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MT47H16M16FG-37E

Manufacturer Part Number
MT47H16M16FG-37E
Description
DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin FBGA Tray
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet

Specifications of MT47H16M16FG-37E

Package
84FBGA
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
533 MHz
Maximum Random Access Time
0.5 ns
Operating Temperature
0 to 85 °C

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Figure 63: Bank Write – with Auto Precharge
PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
DQS, DQS#
Command
Bank select
Address
DQ 6
CK#
CKE
A10
DM
CK
NOP 1
T0
Notes:
Bank x
ACT
RA
RA
T1
t CK
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 and AL = 0 in the case shown.
3. Enable auto precharge.
4. WR is programmed via MR9–MR11 and is calculated by dividing
5. Subsequent rising DQS signals must align to the clock within
6. DI n = data-in from column n; subsequent elements are applied in the programmed order.
7.
8.
these times.
rounding up to the next integer value.
t
t
DSH is applicable during
DSS is applicable during
t RCD
NOP 1
T2
t CH
t CL
WRITE 2
Bank x
Col n
3
T3
WL ± t DQSS (NOM)
WL = 2
NOP 1
t
106
T4
t
DQSS (MAX) and is referenced from CK T6 or T7.
DQSS (MIN) and is referenced from CK T5 or T6.
t WPRE
NOP 1
T5
DI
Micron Technology, Inc. reserves the right to change products or specifications without notice.
n
t RAS
256Mb: x4, x8, x16 DDR2 SDRAM
T5n
t DQSL t DQSH t WPST
NOP 1
5
T6
T6n
Transitioning Data
NOP 1
T7
©2003 Micron Technology, Inc. All rights reserved.
t
DQSS.
t
WR (in ns) by
NOP 1
WR 4
T8
Don’t Care
NOP 1
t
T9
CK and
WRITE
t RP

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