GS840E18AT-166 GSI TECHNOLOGY, GS840E18AT-166 Datasheet - Page 5

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GS840E18AT-166

Manufacturer Part Number
GS840E18AT-166
Description
SRAM Chip Sync Dual 3.3V 4M-Bit 256K x 18 8.5ns/3.5ns 100-Pin TQFP Tray
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS840E18AT-166

Package
100TQFP
Timing Type
Synchronous
Density
4 Mb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
3.3 V
Number Of I/o Lines
18 Bit
Number Of Ports
2
Number Of Words
256K
TQFP Pin Description
Rev: 1.12 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
ADSP, ADSC
Symbol
B
B
A
E
V
DQ
DQ
ADV
DQ
DQ
LBO
GW
V
V
BW
C
A
NC
0
CK
1
ZZ
FT
E
DDQ
G
, A
A
, B
, B
, E
DD
SS
2
A
B
C
D
1
B
D
3
Type
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
-
5/31
Address Strobe (Processor, Cache Controller); active low
Address field LSBs and Address Counter preset Inputs
Byte Write Enable for DQ
Byte Write Enable for DQ
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write—Writes all enabled bytes; active low
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Sleep Mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Chip Enable; active high
GS840E18/32/36AT/B-190/180/166/150/100
Chip Enable; active low
I/O and Core Ground
Core power supply
Address Inputs
Description
No Connect
C
A
, DQ
, DQ
D
B
Data I/Os; active low
Data I/’s; active low
© 1999, GSI Technology

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