GS840E18AT-166 GSI TECHNOLOGY, GS840E18AT-166 Datasheet - Page 12

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GS840E18AT-166

Manufacturer Part Number
GS840E18AT-166
Description
SRAM Chip Sync Dual 3.3V 4M-Bit 256K x 18 8.5ns/3.5ns 100-Pin TQFP Tray
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS840E18AT-166

Package
100TQFP
Timing Type
Synchronous
Density
4 Mb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
3.3 V
Number Of I/o Lines
18 Bit
Number Of Ports
2
Number Of Words
256K
Byte Write Truth Table
Notes:
1.
2.
3.
4.
Rev: 1.12 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Write all bytes
Write all bytes
All byte outputs are active in read cycles regardless of the state of Byte Write Enable inputs.
Byte Write Enable inputs B
All byte I/Os remain High-Z during all write operations regardless of the state of Byte Write Enable inputs.
Bytes “
Write byte
Write byte
Write byte
Write byte
Function
Read
Read
C
” and “
A
B
C
D
D
” are only available on the x32 and x36 versions.
GW
H
H
H
H
H
H
H
L
A
, B
B
, B
C
and/or B
BW
H
X
L
L
L
L
L
L
D
may be used in any combination with BW to write single or multiple bytes.
B
H
H
H
H
X
L
L
X
A
12/31
B
X
H
H
H
H
X
L
L
B
GS840E18/32/36AT/B-190/180/166/150/100
B
X
H
H
H
H
X
L
L
C
B
H
H
H
H
X
L
L
X
D
Notes
2, 3, 4
2, 3, 4
2, 3, 4
2, 3
2, 3
1
1
© 1999, GSI Technology

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