ST70235A STMicroelectronics, ST70235A Datasheet - Page 8

• Manufacturer Part Number: ST70235A
• Description: Transceiver 144-Pin TQFP
• Manufacturer: STMicroelectronics

Specifications of ST70235A

• Package: 144TQFP
• Power Supply Type: Analog
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.62|3 V
• Maximum Operating Supply Voltage: 1.98|3.6 V
• Case: QFP

ST70235A
PIN SUMMARY
8/28
Power Supply
VDD 3.3
VDD 1.8
VSS
ATC INTERFACE
ALE
PCLK
CSB
BE1
WR_RDB
RDYB
INTB
AD
OBC_TYPE
TEST ACCESS PART INTERFACE
TDI
TDO
TCK
TMS
TRSTB
ANALOG FRONT END INTERFACE
AFRXD
AFTXD
CLWD
PDOWN
CTRLDATA
MCLK
ATM UTOPIA INTERFACE
U_RxData
U_TxData
U_RxADDR
U_TxADDR
U_RxCLAV
U_TxCLAV
U_RxENBB
U_TxENBB
U_RxSOC
U_TxSOC
U_RxCLK
U_TxCLK
U_RxRefB
U_TxRefB
Mnemonic
I-TTL
I-TTL
I-TTL
I-TTL
I-TTL
I-TTL
Type
I-PD
I-PU
I-PD
I-PU
I-PD
OZ
OZ
OZ
OZ
OZ
OZ
IO
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
BS Type
C
O
O
O
O
O
C
O
O
O
C
C
O
B
B
I
I
I
I
I
I
I
I
I
I
I
I
I
I
of Signals
Number
16
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
1
1
1
1
8
8
5
5
1
1
1
1
1
1
1
1
1
1
(VSS + 3.3V) Power supply
(VSS + 1.8V) Power supply
0V Ground
Used to latch the address of the internal register to be accessed
Processor clock
Chip selected to respond to bus cycle
Address 1 (not multiplexed)
Specifies the direction of the access cycle
Controls the ATC bus cycle termination
Requests ATC interrupt service
Multiplexed Address/Data bus
Select between i960 (0) or generic (1) controller interface
Refer to section
Receive data nibble
Transmit data nibble
Start of word indication
Power down analog front end
Serial data transmit channel
Master cloc
Receive interface Data
Transmit interface Data
Receive interface Address
Transmit interface Address
Receive interface Cell Available
Transmit interface Cell Available
Receive interface Enable
Transmit interface Enable
Receive interface Start of Cell
Transmit interface Start of Cell
Receive interface Utopia Clock
Transmit interface Utopia Clock
8kHz reference clock to ATM device
8kHz reference clock from ATM device
Function