ST70235A STMicroelectronics, ST70235A Datasheet - Page 7

• Manufacturer Part Number: ST70235A
• Description: Transceiver 144-Pin TQFP
• Manufacturer: STMicroelectronics

Specifications of ST70235A

• Package: 144TQFP
• Power Supply Type: Analog
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.62|3 V
• Maximum Operating Supply Voltage: 1.98|3.6 V
• Case: QFP

PIN FUNCTIONS (continued)
Note: Compensation cell - The COMP_OUT pin must be connected at GND by a 100K
Table 1 : I/O Driver Function
BD4STARP
BD8STARP
TLCHTDQ
TLCHTUQ
TLCHT
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
Pin
Driver
Specifications of the resistor have to meet the following requirements:
± 5% allowed on the value, ±1% is preferred.
Advice is given to place the resistor so that there will be the shortest path between it and the pin.
Using the DISABLE_COMP signal is possible to disable the slew rate control of IOs, in this mode the IOs are however still functional,
but dynamic performances are affected.
An internal pull-down on DISABLE_COMP pin enables the slew rate control of IOs, an external pull-up resistor (connected at 3.3V)
must be inserted in order to disable the slew rate control.
PDOWN
VDD 3.3
AFRXD_0
AFRXD_1
AFRXD_2
AFRXD_3
VSS
CLWD
MCLK
CTRLDATA
VDD 3.3
COMP_VDD_1.8
COMP_ROUT
VSS
DISABLE_COMP
RESERVED
VDD 1.8
IDDq
AFTXD_0
AFTXD_1
VSS
AFTXD_2
AFTXD_3
VDD 3.3
TTL Three Volt capable Schmitt Trigger Bidirectional Pad Buffer, 4mA, with Test pins, with Active Slew
Rate Control
TTL Three Volt capable Schmitt Trigger Bidirectional Pad Buffer, 8mA, with Test pins, with Active Slew
Rate Control
TTL Three Volt capable Input Buffer with Active Pull-Down and Test pin
TTL Three Volt capable Input Buffer with Active Pull-Up and Test pin
TLL Three Volt capable Input Pad Buffer
Name
Type
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
COMP_1V60
COMP_1V60
COMP_1V60
BD4STARP
BD4STARP
BD8STARP
BD8STARP
BD8STARP
BD8STARP
TLCHTDQ
PAD Type
HCMOS7
TLCHT
TLCHT
TLCHT
TLCHT
TLCHT
TLCHT
TLCHT
none
none
BS
O
O
O
O
O
O
C
I
I
I
I
I
Function
Power down analog front end (Reset)
(VSS + 3.3V) Power Supply
Receive data nibble
Receive data nibble
Receive data nibble
Receive data nibble
0V Ground
Start of word indication
Master clock
Serial data Transmit channel
(VSS + 3.3V) Power Supply
Compensation Cell VDD 1.8V (see note 1)
Compensation Cell Resistor (see note 1)
0V Ground
Disable Compensation Cell (see note 1)
Reserved
(VSS + 1.8V) Power Supply
Test pin, active high
Transmit data nibble
Transmit data nibble
0V Ground
Transmit data nibble
Transmit data nibble
(VSS + 3.3V) Power Supply
resistor on board.
Function
ST70235A
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