RFW-D100 Vishay, RFW-D100 Datasheet - Page 5

• Manufacturer Part Number: RFW-D100
• Manufacturer: Vishay

Specifications of RFW-D100

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Document Number 84675
Rev. 1.1, 22-Jan-07
VCC
GND
VCC
GND
VCC
GND
PIN DESCRIPTIONS
DATA [0..7]
RD_n
WR_n
ADDR [0..4]
CS_n
INT
RST
WDT
SYSTEM_CLK
DATA_IO (*)
TX_RX (*)
RF_ACTIVE (*)
OSC_I
CORE
IO
RF
CORE
IO
RF
Name
LQFP Pin Numbers
For more information please contact: [e-mail]
12 - 16
1 - 8
17
18
20
10
21
37
42
26
29
30
24
23
11
31
32
43
9
Type
I/O
(U)
(U)
(U)
(U)
(U)
(X)
I/O
(X)
O
O
O
O
O
I
I
I
I
I
I
excluding RST. This enables communication between the RFW-D100
Interrupts driver pin. This pin goes low whenever any of the interrupts
notify the MCU through its external interrupt pin that an event (such as
Chip’s reset pin. When this pin is set high, all registers and FIFOs are
aborted. Reset is asynchronous to clock input (CLK1). After power-up,
Watchdog timer output. This pin goes high every time the FRC counter
is input, it is a Schmitt-trigger input. A weak pull-up should be applied
This pin controls the RFW122 operation mode. It should be connected
to the RFW122 RX_TX input pin. When TX_RX is low, the RFW122 is
transmitting mode. In most cases TX_RX output pin is determined by
0.1 µF power bypass capacitor should be placed between VCC
This pin is the power supply for the I/O interface of RFW-D100 towards
the RF module (TX_RX, DATA_IO, and RF_ACTIVE). A 0.1 µF power
the MCU. Data, control words, and status information are transferred
Chip select input pin. When CS_n is low, the RFW-D100 is selected;
serial interface for the RFW122 (RFWaves modem). When DATA_IO
0.1 µF power bypass capacitor should be placed between VCC
This pin is the ground for the interface of RFW-D100 towards the RF
This pin is the power supply input for the core logic of RFW-D100. A
overflows. The pulse duration is determined by FRC-H(4:6) register.
SCR2(0) register. SCR3(7) and the capacitor discharge mechanism
When WR_n is low while the RFW-D100 is enabled (CS_n=’0’), the
that are enabled in IER have occurred. The purpose of this pin is to
Serial input or output according to TX_RX mode. It functions as the
provides bi-directional communication between the RFW-D100 and
empty TX_FIFO) has occurred. Goes high when the IER register is
When RD_n is low while the RFW-D100 is enabled (CS_n=’0’), the
bypass capacitor should be placed between VCC
This pin is the power supply input for the I/O cells of RFW-D100. A
RFW-D100 outputs one of its internal register values to DATA[0-7]
This output pin controls the RFW122 working/shutdown mode. Its
RFW-D100 enables writing to its internal registers. The register is
cleared to their initial values. All transceiver traffic is disabled and
These five input signals determine the register to which the MCU
when high, the RFW-D100 is disabled. This pin overrides all pins
This bus comprises eight TRI-STATE input/output lines. The bus
This pin is the oscillator block output (see Figure 3). It should be
prevent voltage droppings. Normally, this capacitor should be
in receiving mode. When RX_TX is high, the RFW122 is in
determined by ADDR [0-4] and the value by DATA [0-7].
This pin is the input of the inverting oscillator amplifier.
This pin is the ground for the core logic of RFW-D100.
This pin is the ground for the I/O cells of RFW-D100.
a pulse in RST input should be applied (by POR).
module (TX_RX, DATA_IO, and RF_ACTIVE).
and GND
common to the RF module VCC as well.
GND
value is determined by SCR4(1).
connected to the CLK input .
via the DATA[0-7] data bus.
IO
CORE
according to ADDR[0-4].
to prevent voltage droppings.
writes or reads from.
and the MCU.
affect this pin.
to prevent voltage droppings.
Description
to this pin.
read.
Vishay RFWaves
RFW-D100
RF
www.vishay.com
and GND
IO
RF
CORE
and
to
5