RFW-D100 Vishay, RFW-D100 Datasheet - Page 12

• Manufacturer Part Number: RFW-D100
• Manufacturer: Vishay

Specifications of RFW-D100

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

RFW-D100
Vishay RFWaves
RT[0:2] in SCR1 register determines the division value
(DIV_VALUE) of the RC oscillator input clock (see
PRE-SCALLER in Figure 7). The clock output of the
PRE-SCALLER
(CLK_RC is the clock output of the RC oscillator).
FRC-L and FRC-H (0-4) registers determine the
overflow
WDT_COUNTER
FRC-H(0:3)*28) * DIV_VALUE RC oscillator periods
before reaching its overflow value. When overflow
occurs, the WDT_COUNTER is cleared and the
RFW-D100 outputs a pulse through the WDT output
pin.
The pulse duration from the WDT output pin is deter-
mined by FRC_H(4:6) value. The pulse duration is
2^(FRC_H(6-4))*RC oscillator periods.
SCR1(3) enables/disables the WDT. When SCR1(3) is
set high, the WDT is enabled otherwise, it is disabled.
The WDT works when the RFW-D100 is in IDLE or
POWER-DOWN mode, since a different clock drives it.
The purpose of the WDT is to enable the MCU and the
RFW-D100 to enter power-down or idle mode and then
to wake them up at a predetermined time.
WDT operating sequence:
1. Disable WDT – SCR1(3) = ‘0’.
www.vishay.com
12
RC_CAP
value
module
RC OSCILLATOR
of
(RC_EN)
SCR1(4)
ENABLE
counts
the
is
WDT_COUNTER.
(FRE-H[3:0],FRE-L[7:0])
CLK_RC/DIV_VALUE
For more information please contact: [e-mail]
(FRC-L(0:7)
Figure 7. WDT and RC Oscillator System
OF_VALUE = 2^FRE[6:4];
IF COUNTER < OF_VALUE THEN
ELSE
END IF;
IF A=1 THEN
END IF;
CLK
A
N=SCR1.RT[0:2]=
COUNTER
COUNTER = COUNTER +1;
WDT = 1;
WDT = 0;
COUNTER =0;
PRE-SCALLER
PULSE
DIV_VALUE=
WDT
The
0 - 7
2^N
+
BIT
12
WDT
2. Enable RC oscillator – SCR1(4) = ‘1’.
3. Apply WDT_RST.
4. Set registers (FRE-H, FRE-L, SCR1) values
5. Enable WDT - SCR1(3) = ‘1’.
RX FIFO
The purpose of having an input FIFO in the RFW-D100
is to reduce the real-time burden on the MCU. The
FIFO is used as a buffer, which theoretically enables
the
RX_FIFO_SIZE * 8 bit/byte * 1 µsec = 128 µsec,
instead of every 1 µsec in the case of serial input or
every 8 µsec in the case where there is a serial to
parallel converter.
The actual buffer size for practical use is a bit smaller,
since the MCU response time is taken into account.
All received bytes are transferred to the RX_FIFO. The
RX_FIFO stores the input data until the MCU reads the
data from it. The RX_FIFO size is 16 bytes.
CRC and PREAMBLE bytes are not transferred to the
RX_FIFO.
The RX_FIFO is accessed just like all other read-only
registers in the RFW-D100. The MCU cannot write to
A
B
COMPERATOR
according to needed WDT pulse.
MCU
BIT
12
to
WDT COUNTER
C
read
SYNC_RST
12 BIT
RST
IF A>=B THEN
C=1
ELSE C=0.
the
incoming
Document Number 84675
WDT_RST
WDT
Rev. 1.1, 22-Jan-07
data
every