RFW-D100 Vishay, RFW-D100 Datasheet - Page 23

• Manufacturer Part Number: RFW-D100
• Manufacturer: Vishay

Specifications of RFW-D100

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

packet for transmission and the RFW-D100 is in
receive mode. When the TX_EMPTY flag is low, the
RFW-D100 is in the middle of a packet transmission.
When transmitting successive packets, the MCU
should wait to the end of a packet before it reloads the
TX_FIFO with the next packet.
Bit 3: CS
Carrier Sense detection bit.
When this bit is high, the RFW-D100 has identified a
structure of packet transmission in the air according to
CSR. When low, no carrier has been detected. This bit
is only valid in receive mode. The conditions for setting
or clearing this flag are determined in the CS register.
When LOCKED is high then CS is meaningless.
Bit 4: LOCK
Signals whether a PREAMBLE was identified.
When flag is “0” the receiver is searching for
PREAMBLE.
When flag is “1” a PREAMBLE was identified. If a
packet was discarded for any reason, LOCK flag goes
low. If the packet has ended LOCK, goes low as well.
This indicator is important because when a packet is
ready for transmission, the indicator can determine if
the line is busy and that in most cases the transmission
will not succeed. If a PREAMBLE has been recognized
but NET_ID and NODE_ID are still not compared, then
the LOCK flag indicates that a packet is being received
before the LOCK_IN interrupt is invoked.
Bit 5: BIT_ERROR
This flag indicates that there was some error in the
received packet. The packet was not received
according the expected timing specifications.
The packet can still pass CRC verification.
Bits 0-3: ONE_CNT [0:3]
This determines the number of successive “1” bits that
set carrier sense high.
If (2*ONE_CNT[0:3] + 2) of ‘1’ bits are received
according to the carrier sense specifications, then CS
flag in SSR is set high.
Bits 4-7: ZERO_CNT [0:3]
The number of successive “0” bits that reset carrier
sense (CS=‘0’).
If (2*ZERO_CNT[0:3] + 2) of ‘0’ bits are received
successively, then CS flag in SSR is set low and
Document Number 84675
Rev. 1.1, 22-Jan-07
Name
CSR
ZERO CNT.3
Bit 7
ZERO CNT.2
Bit 6
For more information please contact: [e-mail]
ZERO CNT.1
Bit 5
ZERO CNT.0
Bit 4
Bit 6: TX_UF
This flag is set whenever the RFW-D100 reads a byte
from an empty TX_FIFO.
This flag indicates an abnormal end of packet trans-
mission. The RDW-D100 transmitter’s state machine
has expected to find a valid byte in the TX_FIFO
according to the packet size, but it found an empty
TX_FIFO. When this event occurs, the TX_EMPTY
interrupt is invoked and the TX_UF (under flow) flag is
set to ‘1’.
This flag is set by hardware and cleaned by the MCU.
It is cleaned whenever the MCU reads the SSR
register.
Bit 7: COMP_IN
This flag reflects the output of the COMPERATOR (for
RSSI) module.
When CMP_VIN > CMP_VREF, then COMP_IN
equals ‘1’.
When CMP_VIN < CMP_VREF, then COMP_IN
equals ‘0’.
Default Value: 0 x 04.
Packet Size Register (PSR)
This is a read/write register.
This register determines the packet size in byte units,
when working in fixed size packets [see PPR(5)]. The
size is fixed for all received and transmitted packets.
The size in PSR excludes 2 bytes of PREAMBLE and
2, 1, or 0 bytes of CRC.
Default Value: 0 x 00.
Carrier Sense Register (CSR)
This is both a read and a write register.
This register configures the carrier sense mechanism
in the RFW-D100.
ONE_CNT is reset.
YOU MUST NOT CHANGE THIS REGISTER WHILE
THE
ENABLED (SCR2(1) – ‘SEARCH_EN’ MUST BE ‘0’
while setting this register).
Default Value: 0 x 44
ONE CNT.3
BIt 3
RFW-D100’S
ONE CNT.2
BIt 2
PREAMBLE
Vishay RFWaves
ONE CNT.1
Bit 1
RFW-D100
SEARCH
www.vishay.com
ONE CNT.0
Bit 0
IS
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