RFW-D100 Vishay, RFW-D100 Datasheet - Page 17

• Manufacturer Part Number: RFW-D100
• Manufacturer: Vishay

Specifications of RFW-D100

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Mechanism
EN_CAP_DISCH in SCR3.
Mechanism
EN_ZERO_DISCH in SCR3.
The number of “0” bits that will cause a discharge in
mechanism
ZERO_DISCH_CNT [0:2].
For both mechanisms, the discharge time is
determined by CAP_DIS_PERIOD in SCR3(2). This
should be set according to the used oscillator
frequency so that the discharge duration will be
3 µsec.
Discharge is done by setting RX_TX pin to ‘1’ for a
certain time and then setting it back to ‘0’.
An interrupt LINK_DIS is attached to the zero counter
capacitor discharge mechanism. The interrupt and the
actual discharge are two separate mechanisms. They
are disabled and enabled separately. An interrupt can
be invoked even if zero counter discharge is disabled
(SCR3.EN_ZERO_DISCH =’0’). If the conditions for a
zero
SCR3.EN_ZERO_DISCH =’0’ and LINK_DIS are
enabled and LINK_DIS will be invoked.
LINK_DIS interrupt is used to synchronize the MCU
about the end of an unidentified transmission on the
channel,
transmission.
(*) More detailed explanations of the reference
capacitor discharge algorithms and motivations can be
found in the “RFW - Capacitor Discharge.pdf”
document.
PREAMBLE LOW REGISTER (PRE-L)
This register contains the 8 least significant bits of the PREAMBLE.
PREAMBLE HIGH REGISTER (PRE-H)
This register contains the 8 least significant bits of the PREAMBLE.
Default Value: 0 x FF.
Document Number 84675
Rev. 1.1, 22-Jan-07
PRE-H
PRE-L
Name
Name
counter
so
1
2
the
2
PR-15
PR-7
Bit 7
Bit 7
is
is
MCU
is
discharge
enabled/disabled
enabled/disabled
determined
can
PR-14
PR-6
Bit 6
Bit 6
For more information please contact: [e-mail]
initiate
are
PR-13
PR-5
Bit 5
Bit 5
by
a
reached,
by
by
packet
bits
bit
bit
~
PR-12
PR-4
Bit 4
Bit 4
CHANGING THE RWF-D100’S CONFIGURA-
TION
It is not recommended to change the RFW-D100
configuration while it is in the middle of receiving or
transmitting a packet.
Thus, before writing to any of the RFW-D100 control
registers (such as BLR, PRE-L, PRE-H, PPR, CSR
etc):
1. Change TX_RX mode to RX.
2. Disable PREAMBLE search (SEARCH_EN in
3. Stop all RX receiving – RX_STOP.
It
configuration.
REGISTER DESCRIPTION
All registers are read and write registers, except the
status registers that are read only.
In case of a RST pulse, all registers are set to their
default value.
BIT LENGTH REGISTER (BLR)
This register determines the length of the bit in terms
of clock cycles.
The bit length is (BLR + 6) clocks, since the
RFW-D100 adds the value 6 to the value in BLR.
The RFW-100’s bit rate is:
Oscillator frequency/(BLR + 6).
Default Value: 00 (0 + 6 = 6).
SCR2).
is
PR-11
PR-3
then
Bit 3
Bit 3
safe
PR-10
PR-2
Bit 2
Bit 2
to
change
Vishay RFWaves
PR-1
PR-9
Bit 1
Bit 1
the
RFW-D100
www.vishay.com
RFW-D100’s
PR-0
PR-8
Bit 0
Bit 0
17