TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 116

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Ed. 3, December 2000
QE1M
TXC-04252
TXC-04252-MB
Address
025
026
6-3
7-0
Bit
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
7
2
1
0
A3DH4E
A2DH4E
A1DH4E
Symbol
Unused
LEXTC
Loss Of External Clock: A 1 indicates an external loss of clock alarm
when the external clock (present on lead 138) is stuck high or low for
1000 ns +/- 500 ns. Recovery to 0 occurs on the first clock transition.
Unused: These bits read out as 0.
A Drop Bus Loss of H4 Indication - AU-3 C/STS-1 No. 3: Loss of mul-
tiframe for AU-3 C/STS-1 No. 3 is declared if one or more H4 values dif-
fer from those of a two-bit counter once per multiframe for two
consecutive multiframes, when control bit DV1SEL is 0. The received H4
multiframe sequence is 00, 01, 10, and 11. The multiframe detector will
continue to operate in a free running mode, but will lock to a new H4
sequence after one multiframe sequence has been received correctly.
This H4 detector is disabled when the format is an AU-4 VC-4, or STS-1.
This bit is forced to 1 at power-up.
A Drop Bus Loss of H4 Indication - AU-3 B/STS-1 No. 2: Loss of mul-
tiframe for AU-3 B/STS-1 No. 2 is declared if one or more H4 values dif-
fer from those of a two-bit counter once per multiframe for two
consecutive multiframes, when control bit DV1SEL is 0. The received H4
multiframe sequence is 00, 01, 10, and 11. The multiframe detector will
continue to operate in a free running mode, but will lock to a new H4
sequence after one multiframe sequence has been received correctly.
This H4 detector is disabled when the format is an AU-4 VC-4, or STS-1.
This bit is forced to 1 at power-up.
A Drop Bus Loss of H4 Indication - AU-3 A/STS-1 No. 1, AU-4 VC-4,
or STS-1: Loss of multiframe for AU-3 A/STS-1 No. 1, AU-4 VC-4 or
STS-1 is declared if one or more H4 values differ from those of a two-bit
counter once per multiframe for two consecutive multiframes, when con-
trol bit DV1SEL is 0. The received H4 multiframe sequence is 00, 01, 10,
and 11. The multiframe detector will continue to operate in a free running
mode, but will lock to a new H4 sequence after one multiframe sequence
has been received correctly. This bit is forced to 1 at power-up.
Same bit definitions as in register 027 hex, except the bits are latched.
DATA SHEET
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Description

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