TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 110

• Manufacturer Part Number: TXC-04252AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04252AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Ed. 3, December 2000
QE1M
TXC-04252
TXC-04252-MB
Address
013
Bit
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
7
6
5
4
3
2
1
0
DV1REF
DV1SEL
Symbol
HEAISE
TOBWZ
RDIEN
NULLZ
DDIND
UQAE
A/B H1/H2 or E1 Byte AIS Enable: Common control for both the A and
B Drop buses. A 1 enables an AIS detected in either the SDH/SONET
H1/H2 bytes, or in the E1 bytes, to generate a receive E1 line AIS and
transmit an RDI (when enabled).
Drop Bus V1 Reference Enable: Common control bit for both buses. In
the Drop Bus Timing Mode this bit must be set to zero. In the Add Bus
Timing Mode this control bit works in conjunction with the DV1REF con-
trol bit according to the following table.
Drop Bus V1 Reference Enable: Common control bit for both buses.
Enabled when add bus timing is selected. This control bit works in con-
junction with the DV1SEL control bit according to the following table:
DV1SEL
Transmit Remote Defect Indication Enable: Common control for both
buses. This control bit enables incoming receive side (Drop) alarms to
generate a Remote Defect Indication in the transmit (Add) direction. This
bit also works in conjunction with the control bit 1BnRDI found in the
Operations (Control) Registers (048H, 078H, 0A8H, 0D8H).
More details of how these control bits function can be found in the Oper-
ation Section on Remote Defect Indications.
Force the NPI Column Unused Bytes to Zero: A 1 forces to 00H the
unused bytes in the column following the NPI bytes when the NPI fea-
ture is enabled for the same TUG-3 (NPIA, NPIB or NPIC is a 1). A 0
forces the unused bytes following the NPI to a high impedance state on
the A/B buses.
Delay Drop Bus Indication Signal: A 1 increases the delay of the drop
bus indication signals (ADIND and BDIND) by one clock cycle.
Unequipped Alarm AIS/RDI/TC Alarm Enable: A common control for
both the A and B Drop buses. A 1 enables a receive E1 line AIS, an RDI
and both of the TC alarms (TCnODI, TCnRDI) to be transmitted when an
unequipped alarm is detected in either the A or B Drop bus signals.
Transmit O-Bit Channel With Zeros: A common control for all four
ports. A 0 enables the microprocessor-written values for the O-bit chan-
nel and the unused bits in the K4 (Z7) byte to be transmitted. A 1 forces
the O-bit channel and the unused bits in the K4 (Z7) byte to be transmit-
ted as zero for all four ports.
DATA SHEET
0
0
1
1
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DV1REF
0
1
0
1
Drop side uses H4 multiframe detector to deter-
Drop side uses H4 multiframe detector to deter-
Drop side uses V1 pulse from drop bus
Drop side uses V1 pulse from drop side
mine V1 pulse Add side uses V1 pulse from
add bus C1J1V1 signal
mine V1 pulse Add side uses V1 pulse from
drop side H4 multiframe detector
C1J1V1 signal Add side uses V1 pulse from
add side C1J1V1 signal
C1J1V1 signal Add side uses V1 pulse from
drop side C1J1V1 signal
Action
Description