LPC2214FBD144 NXP Semiconductors, LPC2214FBD144 Datasheet - Page 9

• Manufacturer Part Number: LPC2214FBD144
• Manufacturer: NXP Semiconductors

Specifications of LPC2214FBD144

• Cpu Family: LPC2000
• Device Core: ARM7TDMI-S
• Device Core Size: 16/32Bit
• Frequency (max): 60MHz
• Interface Type: I2C/SPI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 16KB
• # I/os (max): 112
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/2.5/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 3.
LPC2212_2214_4
Product data sheet
Symbol
P2[7]/D7
P2[8]/D8
P2[9]/D9
P2[10]/D10
P2[11]/D11
P2[12]/D12
P2[13]/D13
P2[14]/D14
P2[15]/D15
P2[16]/D16
P2[17]/D17
P2[18]/D18
P2[19]/D19
P2[20]/D20
P2[21]/D21
P2[22]/D22
P2[23]/D23
P2[24]/D24
P2[25]/D25
P2[26]/D26/BOOT0
P2[27]/D27/BOOT1
P2[28]/D28
P2[29]/D29
P2[30]/D30/AIN4
P2[31]/D31/AIN5
P3[0] to P3[31]
P3[0]/A0
P3[1]/A1
P3[2]/A2
Pin description
Pin
116
117
118
120
124
125
127
129
130
131
132
133
134
136
137
1
10
11
12
13
16
17
18
19
20
89
88
87
…continued
Type Description
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I
I/O
I/O
I/O
I
I/O
I
I/O
O
O
O
External memory data line 7.
External memory data line 8.
External memory data line 9.
External memory data line 10.
External memory data line 11.
External memory data line 12.
External memory data line 13.
External memory data line 14.
External memory data line 15.
External memory data line 16.
External memory data line 17.
External memory data line 18.
External memory data line 19.
External memory data line 20.
External memory data line 21.
External memory data line 22.
External memory data line 23.
External memory data line 24.
External memory data line 25.
D26 — External memory data line 26.
BOOT0 — While RESET is LOW, together with BOOT1 controls booting and
internal operation. Internal pull-up ensures HIGH state if pin is left
unconnected.
D27 — External memory data line 27.
BOOT1 — While RESET is LOW, together with BOOT0 controls booting and
internal operation. Internal pull-up ensures HIGH state if pin is left
unconnected.
BOOT1:0 = 00 selects 8-bit memory on CS0 for boot.
BOOT1:0 = 01 selects 16-bit memory on CS0 for boot.
BOOT1:0 = 10 selects 32-bit memory on CS0 for boot.
BOOT1:0 = 11 selects internal flash memory.
External memory data line 28.
External memory data line 29.
D30 — External memory data line 30.
AIN4 — ADC, input 4. This analog input is always connected to its pin.
D31 — External memory data line 31.
AIN5 — ADC, input 5. This analog input is always connected to its pin.
Port 3 is a 32-bit bidirectional I/O port with individual direction controls for
each bit. The operation of port 3 pins depends upon the pin function selected
via the Pin Connect Block.
External memory address line 0.
External memory address line 1.
External memory address line 2.
Rev. 04 — 3 January 2008
16/32-bit ARM microcontrollers
LPC2212/2214
© NXP B.V. 2008. All rights reserved.
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