TE28F160S375 Intel, TE28F160S375 Datasheet - Page 13

• Manufacturer Part Number: TE28F160S375
• Manufacturer: Intel

Specifications of TE28F160S375

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 75ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7/3.3/5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

3.6
The read-identifier codes operation outputs the
manufacturer code, device code, and block lock
configuration codes for each block configuration
(see Figure 6). Using the manufacturer and
device
automatically match the device with its proper
algorithms. The block-lock configuration codes
identify each block’s lock-bit setting.
Figure 6. Device Identifier Code Memory Map
ADVANCE INFORMATION
codes,
Read Identifier Codes
Operation
the
system
software
can
3.7
Writing commands to the CUI enables reading of
device data, query, identifier codes, inspection
and clearing of the Status Register. Additionally,
when V
and lock-bit configuration can also be performed.
The Block Erase command requires appropriate
command data and an address within the block
to be erased. The Byte/Word Write command
requires the command and address of the
location to be written. Set Block Lock-Bit
commands require the command and address
within the block to be locked. The Clear Block
Lock-Bits command requires the command and
an address within the device.
The CUI does not occupy an addressable
memory location. It is written when WE#, CE
and CE
and data needed to execute a command are
latched on the rising edge of WE# or CE
(CE
Standard microprocessor write timings are used.
Figure 18 illustrates a write operation.
4.0
V
from the Status Register, identifier codes, or
memory blocks. Placing V
successful block erase, programming, and lock-
bit configuration operations.
Device operations are selected by writing specific
commands into the CUI. and Table 3 define
these commands.
PP
0
#,
voltage
PP
1
COMMAND DEFINITIONS
# are active and OE# = V
CE
Write
= V
1
#),
PPH1/2
V
PPLK
whichever
, block erasure, programming,
enables read operations
28F160S3, 28F320S3
PPH1/2
goes
on V
IH
. The address
high
PP
enables
first.
13
0
X
#,
#