M29W800AT90M1 Micron Technology Inc, M29W800AT90M1 Datasheet - Page 14

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M29W800AT90M1

Manufacturer Part Number
M29W800AT90M1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M29W800AT90M1

Cell Type
NOR
Density
8Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Top
Address Bus
20/19Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
SO
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
1M/512K
Supply Current
10mA
Mounting
Surface Mount
Pin Count
44
Lead Free Status / Rohs Status
Supplier Unconfirmed

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M29W800AT, M29W800AB
Table 8. Instructions
Note: 1. Commands not interpreted in this table will default to read array mode.
14/40
RD
ES
AS
Mne.
PG
BE
CE
ER
10. During Erase Suspend, Read and Data Program functions are allowed in blocks not being erased.
(2,4)
(10)
2. A wait of t
3. X = Don't Care.
4. The first cycles of the RD or AS instructions are followed by read operations. Any number of read cycles can occur after the com-
5. Signature Address bits A0, A1, at V
6. Block Protection Address: A0, at V
7. For Coded cycles address inputs A11-A18 are don't care.
8. Optional, additional Blocks addresses must be entered within the erase timeout delay after last write entry, timeout statuscan be
9. Read Data Polling, Toggle bits or RB until Erase completes.
(4)
operation (see Tables 15,
mand cycles.
code.
verified through DQ3 value (see Erase Timer Bit DQ3 description). When full command is entered, read Data Polling or Toggle bit
until Erase is completed or suspended.
Read/Reset
Block Erase
Auto Select 3+
Chip Erase
Suspend
Program
Resume
Memory
Erase
Erase
Instr.
Array
PLYH
is necessary after a Read/Reset command if the memory was in an Erase or Program mode before starting any new
Cyc.
1+
3+
4
6
6
1
1
(1)
Addr.
Data
Addr.
(3,7)
Data
Addr.
(3,7)
Data
Addr.
(3,7)
Data
Addr.
(3,7)
Data
Addr.
(3,7)
Data
Addr.
Data
Addr.
Data
16
and Figure 13).
(3,7)
(3,7)
(3,7)
IL
Word
Word
Word
Word
Word
Byte
Byte
Byte
Byte
Byte
IL
, A1 at V
will output Manufacturer code (20h). Address bits A0 at V
1st Cyc. 2nd Cyc. 3rd Cyc. 4th Cyc. 5th Cyc. 6th Cyc.
AAAh
AAAh
AAAh
AAAh
AAAh
IH
555h
555h
555h
555h
555h
AAh
AAh
AAh
AAh
AAh
B0h
F0h
30h
X
X
X
and A15-A18 within the Block will output the Block Protection status.
Read until Toggle stops, then read all the data needed from any
Block(s) not being erased then Resume Erase.
Read Data Polling or Toggle Bits until Erase completes or Erase
is suspended another time.
2AAh
2AAh
2AAh
2AAh
2AAh
555h
555h
555h
555h
555h
55h
55h
55h
55h
55h
Read Memory Array until a new write cycle is initiated.
AAAh
AAAh
AAAh
AAAh
AAAh
555h
555h
555h
555h
555h
A0h
F0h
90h
80h
80h
Read Electronic Signature or Block
Protection Status until a new write cycle is
initiated. See Note 5 and 6.
Read Memory Array until a new write cycle
Program
Program
Address Read Data Polling or Toggle Bit
AAAh
AAAh
555h
555h
Data
AAh
AAh
until Program completes.
2AAh
2AAh
555h
555h
55h
55h
IH
and A1, at V
is initiated.
Address
AAAh
Block
555h
30h
10h
IL
will output Device
Additional
7th Cyc.
Block
Note 9
30h
(8)

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