CYNSE70256-66BHC Cypress Semiconductor Corp, CYNSE70256-66BHC Datasheet - Page 4

• Manufacturer Part Number: CYNSE70256-66BHC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70256-66BHC

• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

CYNSE70256
LIST OF FIGURES
Figure 2-1. CYNSE70256 Block Diagram................................................................................................ 9
Figure 5-1. CYNSE70256 Clocks (CLK2X and PHS_L) ........................................................................ 12
Figure 5-2. CYNSE70256 Clocks (CLK1X) ........................................................................................... 12
Figure 5-3. CYNSE70256 Clocks for All Timing Diagrams .................................................................... 13
Figure 7-1. Comparand Register Selection during Search and Learn Instructions ............................... 14
Figure 7-2. Addressing the GMR Array ................................................................................................. 14
Figure 8-1. CYNSE70256 Database Width Configuration for Each of the Two Banks .......................... 17
Figure 8-2. Multiwidth Database Configurations Example ..................................................................... 18
Figure 9-1. Addressing the CYNSE70256 Data and Mask Arrays ........................................................ 19
Figure 10-1. Single-Location Read Cycle Timing .................................................................................. 21
Figure 10-2. Burst Read of the Data and Mask Arrays (BLEN = 4) ....................................................... 22
Figure 10-3. Single Write Cycle Timing ................................................................................................. 23
Figure 10-4. BURST Write of the Data and Mask Arrays (BLEN = 4) ................................................... 24
Figure 10-5. Hardware Diagram for a Table with Four Devices ............................................................ 25
Figure 10-6. Timing Diagram for 72-bit Search Device Number 0......................................................... 26
Figure 10-7. Timing Diagram for 72-bit Search Device Number 1......................................................... 27
Figure 10-8. Timing Diagram for 72-bit Search Device Number 3 (Last Device) .................................. 28
Figure 10-9. ×72 Table with Four Devices............................................................................................. 29
Figure 10-10. Hardware Diagram for a Table with Fifteen Devices ....................................................... 30
Figure 10-11. Hardware Diagram for a Block of up to Four Devices ..................................................... 31
Figure 10-12. Timing Diagram for Each Device in Block Number 0 (Miss on Each Device) ................. 31
Figure 10-13. Timing Diagram for Each Device Above the Winning Device in Block Number 1 ........... 32
Figure 10-14. Timing Diagram for Globally Winning Device in Block Number 1 ................................... 33
Figure 10-15. Timing Diagram for Devices Below the Winning Device in Block Number 1 ................... 34
Figure 10-16. Timing Diagram for Devices Above the Winning Device in Block Number 2 .................. 35
Figure 10-17. Timing Diagram for Globally Winning Device in Block Number 2 ................................... 36
Figure 10-18. Timing Diagram for Devices Below the Winning Device in Block Number 2 ................... 37
Figure 10-19. Timing Diagram for Devices Above the Winning Device in Block Number 3 .................. 38
Figure 10-20. Timing Diagram for Globally Winning Device in Block Number 3 ................................... 39
Figure 10-21. Timing Diagram for Devices Below the Winning Device in Block Number 3
(Except the Last Device [Device 14])..................................................................................................... 40
Figure 10-22. Timing Diagram for Device Number 3
in Block Number 3 (Device 14 in Depth-Cascaded Table) .................................................................... 41
Figure 10-23. ×72 Table with Fifteen Devices ....................................................................................... 42
Figure 10-24. Hardware Diagram for a Table with Four Devices .......................................................... 43
Figure 10-25. Timing Diagram for 144-bit Search Device Number 0..................................................... 44
Figure 10-26. Timing Diagram for 144-bit Search Device Number 1..................................................... 45
Figure 10-27. Timing Diagram for 144-bit Search Device Number 7 (Last Device) .............................. 46
Figure 10-28. ×144 Table with Four Devices......................................................................................... 47
Figure 10-29. Hardware Diagram for a Table with Fifteen Devices ....................................................... 49
Figure 10-30. Hardware Diagram for a Table with Four Devices .......................................................... 49
Figure 10-31. Timing Diagram for Each Device in Block Number 0 (Miss on Each Device) ................. 50
Figure 10-32. Timing Diagram for Each Device Above the Winning Device in Block Number 1 ........... 51
Figure 10-33. Timing Diagram for Globally Winning Device in Block Number 1 ................................... 52
Figure 10-34. Timing Diagram for Devices Below the Winning Device in Block Number 1 ................... 53
Figure 10-35. Timing Diagram for Devices Above the Winning Device in Block Number 2 .................. 54
Figure 10-36. Timing Diagram for Globally Winning Device in Block Number 2 ................................... 55
Figure 10-37. Timing Diagram for Devices Below the Winning Device in Block Number 2 ................... 56
Figure 10-38. Timing Diagram for Devices Above the Winning Device in Block Number 3 .................. 57
Document #: 38-02035 Rev. *E
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