B69000 Asiliant Technologies, B69000 Datasheet - Page 78

• Manufacturer Part Number: B69000
• Manufacturer: Asiliant Technologies

Specifications of B69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

7-6
10-9
8
7
6
5
4-0
&+,36
DEVSEL# Timing
These two bits specify the longest-possible amount of time that the 69000 will take in decoding an
address and asserting DEVSEL#. These two bits always return a value of 01, indicating a medium-
length timing.
Data Parity Error Detected
This bit applies only to PCI Bus masters. Since the 69000 never functions as a PCI Bus master,
this bit always returns a value of 0 when read.
Fast Back-to-Back Capable
This bit always returns a value of 1 when read, indicating that the 69000 is capable of fast back-to-
back transactions that are not in the same segment.
UDF Supported
This bit always returns a value of 0 when read, indicating that the 69000 does not provide features
that are definable by the end-user.
66MHz Capable
This bit always returns a value of 0 when read, indicating that the 69000 can be used with PCI at a
bus speed of 33MHz, not 66MHz.
This graphics controller is compatible with the AGP bus as a device capable of frame-based AGP
transfers, only, but it is NOT compatible with PCI-66 (the 66MHz version of PCI first described in
revision 2.1 of the PCI specification from the PCI SIG), and the fact that this bit returns the value of
0 when read is intended to reflect this.
The setting of this bit has NO bearing on AGP compatibility -- this bit is entirely ignored by AGP
device configuration firmware.
Reserved
Each of these bits always return a value of 0 when read.
69000 Databook
Subject to Change Without Notice
PCI Configuration Registers
Revision 1.3 8/31/98